Non-volatile memory device having an asymmetrical gate dielectric layer and method of manufacturing the same

Inactive Publication Date: 2005-09-22
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0013] It is therefore a feature of an embodiment of the present invention to provide a memory device having excellent electron injection efficiency in a floating gate and low power consumption.

Problems solved by technology

Such a driving mechanism of a conventional non-volatile memory device has problems such as having a low electron storing efficiency and a high power consumption.
Therefore, problems such as relatively low electron injection efficiency exist since high consumption voltage is applied to drive the memory device.

Method used

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  • Non-volatile memory device having an asymmetrical gate dielectric layer and method of manufacturing the same
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  • Non-volatile memory device having an asymmetrical gate dielectric layer and method of manufacturing the same

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Embodiment Construction

[0033] Korean Patent Application No. 10-2004-0018748, filed on Mar. 19, 2004, in the Korean Intellectual Property Office, and entitled: “Non-Volatile Memory Device With Asymmetrical Gate Dielectric Layer and Method of Manufacturing the Same,” is incorporated by reference herein in its entirety.

[0034] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the figures, the dimensions of films, layers and regions are exaggerated for clarity of illustration. It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be...

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Abstract

In a memory device, and a method of manufacturing the same, the memory device includes a semiconductor substrate, a first impurity region and a second impurity region formed by injecting impurities into the semiconductor substrate, and a gate structure on the semiconductor substrate between the first impurity region and the second impurity region, the gate structure including a gate electrode and an asymmetric dielectric layer including a floating gate.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a non-volatile memory device having an asymmetrical gate dielectric layer. More particularly, the present invention relates to a non-volatile memory device, in which a thickness of a gate dielectric layer is varied to provide a high electron storing density with a low driving voltage difference, and a method of manufacturing the same. [0003] 2. Description of the Related Art [0004] A data storing capacity of a semiconductor memory device changes proportionately with a number of memory cells, i.e., a degree of integration. A semiconductor memory device includes many memory cells, which are connected through circuits. A non-volatile memory device has improved features of low power consumption and excellent stability as compared to a conventional flash memory device. With the development in processing technology significant research has been performed to improve the degree of integratio...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/8247H01L21/8239H01L27/105H01L27/115H01L29/423H01L29/788H01L29/792
CPCH01L21/28273H01L21/28282H01L29/792H01L29/42372H01L29/7883H01L29/42324H01L29/40114H01L29/40117
InventorHAN, JEONG HEECHAE, SOODOOJEON, SANGHUN
OwnerSAMSUNG ELECTRONICS CO LTD