Conduction type adjustable source-drain resistance variable double-sided folded gate transistor and manufacturing method thereof
A conductivity type, transistor technology, used in semiconductor/solid-state device manufacturing, transistors, circuits, etc., can solve the problems of device switching performance degradation, inability to change conductivity type, conductivity type unswitchable, etc., and achieve the effect of low subthreshold swing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Publication Date
- 2019-10-15
Smart Images

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Abstract
Description
technical field
[0001] The invention relates to the field of ultra-large-scale integrated circuit manufacturing, in particular to a conduction type adjustable source-drain resistance variable double-sided folded gate transistor with low leakage current suitable for low-power integrated circuit manufacturing and a manufacturing method thereof. Background technique
[0002] When ordinary tunneling field effect transistors are used as switching devices, they use the tunneling mechanism of carriers, which can make the subthreshold swing of ordinary tunneling field effect transistors better than the 60mV / dec limit of MOSFETs. However, tunneling field effect transistors based on silicon-based materials have limited tunneling probability due to the limited band gap. Compared with MOSFETs, it is difficult to generate a conduction current of the same order. More seriously, the source and drain electrodes Doping with impurities of different conductivity types, the asymmetric structura...
Examples
Embodiment Construction
[0102] Below in conjunction with accompanying drawing, the present invention will be further described:
[0103] like figure 1 , figure 2 and image 3 As shown, a conduction type adjustable source-drain resistance variable double-sided folded gate transistor includes a silicon substrate 12 of an SOI wafer, and a substrate insulating layer 11 of the SOI wafer is above the silicon substrate 12 of the SOI wafer. Above the substrate insulating layer 11 of the SOI wafer is a monocrystalline silicon film 1, a conductivity type selection gate 2, a partial area of the gate electrode insulating layer 7, and a partial area of the insulating dielectric barrier layer 13; wherein, the monocrystalline silicon film 1 is The impurity concentration is lower than 10 16 cm -3 The monocrystalline silicon semiconductor material has a U-shaped groove structure; the metal source-drain interchangeable region a5 and the metal source-drain interchangeable region b6 are respectively located on ...