Process for sequential growth of active layers

Abstract

The invention discloses a process for sequentially growing an active layer. Specifically, the present invention relates to a process for producing a silicon carbide (SiC) substrate, comprising the steps of: growing a first buffer layer (B1) on a substrate (S) using a first process gas comprising a first concentration of a dopant; growing a first epitaxial layer (epi 1) on the layer (B1) using a second process gas comprising a second concentration of dopant; growing a second buffer layer (B2) on the first epitaxial layer (epi 1) using a third process gas comprising a third concentration of dopant; a second epitaxial layer (epi 2) is grown on the second buffer layer (B2) using a fourth process gas comprising a fourth concentration of dopant. Furthermore, the invention relates to a substrate obtained by the above-mentioned process, which contains, in the second epitaxial layer (epi2), lt; the crystal defect number is 1ppm.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor production, and in particular to the production of silicon carbide substrates. Background Art

[0002] Silicon carbide substrates produced according to the prior art are for example Figure 1 Shown in.

[0003] In particular, this technology is defined as "single buffer" and comprises a lower layer S, a first buffer layer B1 and a final epitaxial layer.

[0004] The buffer layer B1 has a thickness ranging from 0.1 μm to several μm.

[0005] This process allows closing of up to 90-99% of the crystal defects; this means that 1% to 10% of the crystal defects remain in the crystal matrix.

[0006] Defects in SiC wafers are interruptions in the periodic crystal structure and can be distinguished as:

[0007] (1) Crystalline defects within the wafer (such as, but not limited to, dislocations, stacking errors, and point defects), and

[0008] (2) Surface defects at or near the wafer surface (such as, but not limited to: "carrots", polymorphic inclusions, commonly known as triangular defects, and scratches).

[0009] It is well known that the performance of SiC devices depends critically on the presence of so-called fatal defects formed during the crystal growth process.

[0010] Defects in the crystal structure can damage and compromise the performance of the products that contain them.

[0011] For this purpose, reliability assessments (aging tests) are provided, as well as very strict quality controls downstream of production.

[0012] Considering that silicon carbide SiC semiconductors are used in a very wide range of electronic products today, especially in the aviation, aerospace and automotive fields; their demand is constantly growing.

[0013] Therefore, the manufacturing industry faces the challenge of producing high-quality silicon carbide (SIC) semiconductors.

[0014] Therefore, reducing the likelihood of creating defects in semiconductor structures, especially crystalline defects, also helps to reduce costs by eliminating intermediate testing steps.

[0015] Prior art document US2022 / 059658 discloses a silicon carbide substrate and an epitaxial layer, including a first silicon carbide layer, a second silicon carbide layer, a third silicon carbide layer, a fourth silicon carbide layer and a fifth silicon carbide layer, wherein the first silicon carbide layer is a buffer layer.

[0016] Prior art document US10.858.757 discloses an epitaxial substrate, including a silicon carbide single crystal substrate and a silicon carbide epitaxial layer disposed on the single crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer, wherein the first epitaxial layer and the second epitaxial layer are buffer layers.

[0017] Prior art document US2023 / 118623 discloses a silicon carbide substrate on which at least two adjacent layers of silicon carbide films are formed as buffer layers, and an epitaxial layer is formed on the buffer layer. Summary of the invention

[0018] The inventors of this patent application have developed a process for producing silicon carbide SIC substrates that reduces the incidence of crystal defects to <1 ppm.

[0019] In a first aspect, the invention describes a process for producing a silicon carbide substrate.

[0020] In a second object, the invention describes a silicon substrate obtained with the process of the invention.

[0021] Electronic devices comprising a semiconductor obtained according to the invention represent a further object. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of a silicon carbide substrate produced according to the prior art is shown.

[0023] Figure 2 The steps of producing a substrate according to the present invention are shown, wherein the rightmost figure shows a schematic diagram of the final substrate. DETAILED DESCRIPTION

[0024] According to a first object of the present invention, a process for producing a silicon carbide substrate is described.

[0025] In particular, the process includes the following steps:

[0026] 1) growing a first buffer layer B1 on the substrate S,

[0027] 2) growing a first epitaxial layer epi1 on the first layer B1,

[0028] 3) growing a second buffer layer B2 on the first epitaxial layer epi1,

[0029] 4) Growing a second epitaxial layer epi2 (or a final epitaxial layer) on the second buffer layer B2.

[0030] For the purposes of the present invention, the substrate S on which the process is performed is a commercial substrate used in semiconductor manufacturing.

[0031] The thickness of such a substrate S is typically up to 300 μm.

[0032] In one aspect of the invention, substrate S has a resistivity of up to 10 milliohms.

[0033] As regards step 1) of growing the first buffer layer B1, according to a first embodiment of the invention, this is performed using a first process gas containing a dopant in a first concentration (c1).

[0034] For the purposes of the present invention, the first process gas may include a gas selected from the group consisting of: SiHCl3, SiH4, Si2H6, H2SiCl2, Teos (tetraethyl orthosilicate).

[0035] The first process gas may also include a gas selected from the following: alkanes (C3H8 and other alkanes C n H 2n+2 ), olefins (C n H 2n ), alkynes (C n H 2n-2 ).

[0036] The flow rate of the first process gas may be 10-25 sccm (standard cubic centimeters per minute).

[0037] The first process gas may be C2H4.

[0038] For example, C2H4 can have a flow rate of 10-25 sccm.

[0039] The first process gas may further include hydrogen gas H2.

[0040] The flow rate of hydrogen gas may be 35-60 sccm.

[0041] The first process gas may include Ar as a carrier.

[0042] The first process gas may further include HCl and ClF4 as catalysts and for surface cleaning.

[0043] The dopant in the first process gas is nitrogen, and the first concentration is up to 0.5% or up to 1%.

[0044] For the purposes of the present invention, in step 1) of growing the first buffer layer B1 , a carbon / silicon C / Si ratio of up to 3 is used.

[0045] In a preferred aspect of the present invention, the first buffer layer B1 has a thickness of up to 1E19 cm -3 Number of carriers (N) / cm 3 , sometimes called "resistivity", preferably 1E17cm -3 and 1E19cm -3 between.

[0046] The resistivity is expressed as carrier number (N) / cm 3 is common practice in the art (in particular, the higher the carrier number, the lower the resistivity).

[0047] The growth rate of the first buffer layer B1 is about 4-60 μm / h, preferably about 4-10 μm / h.

[0048] The processing temperature for growing the first buffer layer B1 is about 1500-1700°C.

[0049] The process pressure for growing the first buffer layer B1 is about 50-300 mbar.

[0050] The residence time in the chamber was less than one hour.

[0051] For the purpose of the present invention, the first buffer layer B1 has a thickness between about 0.1-3 μm.

[0052] As regards step 2) of growing the first epitaxial layer epi1, according to the first embodiment of the invention this is performed by using a second process gas comprising a second concentration (c2) of dopants.

[0053] For the purposes of the present invention, the second process gas may include a gas selected from the group consisting of SiHCl3, SiH4, Si2H6, H2SiCl2, Teos (tetraethyl orthosilicate).

[0054] The second process gas may include a gas selected from the group consisting of alkanes (C3H8 and other alkanes C n H 2n+2 ), olefins (C n H 2n ), alkynes (C n H 2n-2 ).

[0055] The flow rate of the second process gas may be about 30-75 sccm.

[0056] The second process gas may be C2H4.

[0057] For example, C2H4 can have a flow rate of about 30-75 sccm.

[0058] The second process gas may further include hydrogen gas H2.

[0059] The flow rate of hydrogen gas may be about 70-120 sccm.

[0060] The second process gas may include Ar as a carrier.

[0061] The second process gas may further include HCl and ClF4 as catalysts and for surface cleaning.

[0062] The dopant in the second process gas is nitrogen, and the second concentration is up to 0.5% or up to 1%.

[0063] For the purposes of the present invention, in step 2) of growing the first epitaxial layer epi1 , a carbon / silicon C / Si ratio of up to 2 is used.

[0064] In a preferred aspect of the present invention, the first epitaxial layer epi1 has a thickness of up to 1E17 cm -3 Number of carriers (N) / cm 3 , preferably at 1E15cm -3 and 1E17cm -3 between.

[0065] The growth rate of the first epitaxial layer epi1 is about 4-60 μm / h, preferably about 20-40 μm / h.

[0066] The processing temperature for growing the first epitaxial layer epi1 is about 1500-1700°C.

[0067] The process pressure for growing the first epitaxial layer epi1 is about 50-300 mbar.

[0068] The residence time in the chamber was less than one hour.

[0069] For the purpose of the present invention, the first epitaxial layer epi1 has a thickness between about 0.1-1 μm.

[0070] Therefore, it is defined as a thin epitaxial layer.

[0071] Regarding step 3) of growing the second buffer layer B2, this is performed using a third process gas containing a dopant at a third concentration (c3).

[0072] For the purposes of the present invention, the third process gas may include a gas selected from the group consisting of: SiHCl3, SiH4, Si2H6, H2SiCl2, Teos (tetraethyl orthosilicate).

[0073] The third process gas may include a gas selected from the following: alkanes (C3H8 and other alkanes C n H 2n+2 ), olefins (C n H2n ), alkynes (C n H 2n-2 ).

[0074] The flow rate of the third process gas may be about 10-25 sccm.

[0075] The third process gas may be C2H4.

[0076] For example, C2H4 can have a flow rate of about 10-25 sccm.

[0077] The third process gas may further include hydrogen H2.

[0078] The flow rate of hydrogen gas may be about 35-60 sccm.

[0079] The third process gas may include Ar as a carrier.

[0080] The third process gas may further include HCl and ClF4 as catalysts and for surface cleaning.

[0081] The dopant in the third process gas is nitrogen, and the third concentration is up to 0.5% or up to 1%.

[0082] For the purposes of the present invention, in step 3) of growing the second buffer layer B2, a carbon / silicon C / Si ratio of up to 3 is employed.

[0083] In a preferred aspect of the present invention, the second buffer layer B2 has a thickness of up to 1E19 cm -3 or up to 1E20cm -3 Number of carriers (N) / cm 3 , preferably at 1E17cm -3 and 1E19cm -3 between.

[0084] The growth rate of the second buffer layer B2 is about 4-60 μm / h, preferably about 4-10 μm / h.

[0085] The processing temperature for growing the second buffer layer is about 1500-1700°C.

[0086] The process pressure for growing the second buffer layer is about 50-300 mbar.

[0087] The residence time in the chamber was less than one hour.

[0088] For the purpose of the present invention, the thickness of the second buffer layer B2 is between about 0.1 μm and 2 μm.

[0089] As regards the step 4) of growing the second epitaxial layer epi2, according to the first embodiment of the invention, this is performed using a fourth process gas comprising a dopant at a fourth concentration (c4).

[0090] For the purposes of the present invention, the fourth process gas may include a gas selected from the group consisting of: SiHCl3, SiH4, Si2H6, H2SiCl2, Teos (tetraethyl orthosilicate).

[0091] The fourth process gas may include a gas selected from the following: alkanes (C3H8 and other alkanes C n H 2n+2 ), olefins (C n H 2n ), alkynes (C n H 2n-2 ).

[0092] The flow rate of the fourth process gas may be about 40-100 sccm.

[0093] The fourth process gas may be C2H4.

[0094] For example, C2H4 can have a flow rate of about 40-100 sccm.

[0095] The fourth process gas may further include hydrogen H2.

[0096] The flow rate of hydrogen gas may be about 70-200 sccm.

[0097] The fourth process gas may include Ar as a carrier.

[0098] The fourth process gas may further include HCl and ClF4 as catalysts and for surface cleaning.

[0099] For the purposes of the present invention, in step 4) of growing the second epitaxial epi2, a carbon / silicon C / Si ratio of up to 2 is employed.

[0100] The dopant in the fourth process gas is nitrogen, and the fourth concentration is up to 0.5% or up to 1%.

[0101] In a preferred aspect of the present invention, the second epitaxial layer epi2 has a thickness of up to 1E17 cm -3 The resistivity is preferably 1E15cm -3 and 1E17cm -3 between.

[0102] The growth rate of the second epitaxial layer epi2 is 3 to 6 times higher than the growth rates of the buffer layers B1 and B2.

[0103] The growth rate of the second epitaxial layer epi2 is about 3-60 μm / h, preferably about 20-40 μm / h.

[0104] The processing temperature for growing the second epitaxial layer epi2 is about 1500-1700°C.

[0105] The process pressure for growing the second epitaxial layer epi2 is about 50-300 mbar.

[0106] The residence time in the chamber was less than one hour.

[0107] For the purposes of the present invention, the second epitaxial layer epi2 has a thickness of up to 100 μm.

[0108] Preferably, the second epitaxial layer epi2 has a thickness of about 3-100 μm, and may be used in applications with high voltage (10,000 volts) or special detectors.

[0109] More preferably, the second epitaxial layer epi2 has a thickness of about 5-15 μm and can be used in 600, 800, 1000 or 1500 volt diodes.

[0110] According to the present invention, the dopant used in the process disclosed above has a first concentration and a third concentration, wherein each of them is higher, preferably independently higher, than each of the second concentration and the fourth concentration.

[0111] According to one embodiment of the present invention, the process gases in steps 1), 2), 3) and 4) include C2H4 and hydrogen, and their flow rates are reported as follows:

[0112]

[0113] According to a first aspect of the invention, the above process is of integrated and continuous type.

[0114] This means that an initial substrate S is introduced into a reactor, inside which all the steps of the process are carried out, directly obtaining the final product, which is extracted from the reactor at the end of the process.

[0115] According to another aspect of the present invention, the above process is of discontinuous type.

[0116] This means that after each process step or after one, two or three consecutive process steps, the substrate is removed from the reactor, cooled and then inserted back into the reactor for the subsequent step.

[0117] In a second object of the invention, the present patent application discloses obtaining a silicon substrate using the process of the invention.

[0118] In particular, the substrate contains a crystal defect number of <1 ppm in the second epitaxial layer epi2.

[0119] According to a further object of the present invention, an electronic device comprising a semiconductor obtained by the above process is described.

[0120] The process described in this patent application has been shown to produce better substrates, for example improving the electrical performance and reliability of devices incorporating them.

[0121] These improvements help to improve the electrical performance and reliability of the device.

[0122] Furthermore, the mechanical properties of the fabricated devices are also improved (the improvement is about a few percent), providing a great advantage since the cost of silicon carbide substrates in the manufacturing process is about 60%-80%.

Claims

1. A process for producing a silicon carbide (SiC) substrate, comprising the following steps: 1) growing a first buffer layer (B1) on a substrate (S) using a first process gas including a dopant at a first concentration, 2) growing a first epitaxial layer (epi1) on said layer (B1) using a second process gas comprising a second concentration of dopants, 3) growing a second buffer layer (B2) on the first epitaxial layer (epi1) using a third process gas including a third concentration of dopant, 4) growing a second epitaxial layer (epi2) on the second buffer layer (B2) using a fourth process gas including a fourth concentration of a dopant.

2. The process according to the preceding claim, wherein: The first, second, third and fourth process gases include gases selected from the group consisting of SiHCl3, SiH4, Si2H6, H2SiCl2, Teos (tetraethyl orthosilicate).

3. The process according to claim 1 or 2, wherein: The first, second, third and fourth process gases are selected from the group consisting of alkanes, alkenes and alkynes.

4. A process according to any one of the preceding claims, wherein: In step 1) and step 3), each of the first process gas and the third process gas independently flows at a flow rate of 10-25 sccm.

5. A process according to any one of the preceding claims, wherein: In step 2), the second process gas flows at a flow rate of 30-75 sccm.

6. A process according to any one of the preceding claims, wherein: In step 4), the fourth process gas flows at a flow rate of 40-100 sccm.

7. A process according to any one of the preceding claims, wherein: Each of the first, second, third, and fourth process gases may independently contain hydrogen.

8. The process according to the preceding claim, wherein: In step 1) and step 3), hydrogen gas flows at a flow rate of 35-60 sccm.

9. The process of claim 7, wherein: In step 2), hydrogen gas flows at a flow rate of 70-120 sccm.

10. A process according to any one of the preceding claims, wherein: In step 4), hydrogen gas flows at a flow rate of 70-200 sccm.

11. A process according to any one of the preceding claims, wherein: The first, second, third and fourth dopant concentrations are up to 0.5% or up to 1%.

12. A process according to any one of the preceding claims, wherein: Each of the first and third dopant concentrations is independently higher than each of the second and fourth dopant concentrations.

13. A process according to any one of the preceding claims, wherein: The growth rate of steps 1) and 3) is 4-60 μm / h, preferably about 4-10 μm / h.

14. A process according to any one of the preceding claims, wherein: The growth rate in step 4) is 3-60 μm / h, preferably 20-40 μm / h.

15. A process according to any one of the preceding claims, wherein: In steps 1) and 3), carbon / silicon ratios of up to 3 are employed.

16. A process according to any one of the preceding claims, wherein: In steps 2) and 4), carbon / silicon ratios of up to 2 are employed.

17. The process according to any one of the preceding claims, which is carried out continuously or discontinuously.

18. A process according to any one of the preceding claims, wherein: The second epitaxial layer (epi2) is grown up to a thickness of up to 100 μm.

19. A substrate obtained by a process according to any one of the preceding claims, comprising in the second epitaxial layer (epi2) a number of crystal defects of <1 ppm.

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