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4results about How to "Eliminate area" patented technology

Mura defect detection method and device of TFT-LCD display screen and electronic equipment

The invention discloses a Mura defect detection method and device of a TFT-LCD display screen and electronic equipment, and relates to the field of display screens. The method comprises the following steps: acquiring an original image of a TFT-LCD display screen to be detected; preprocessing the original image to obtain a target image, the preprocessing including image noise reduction and image enhancement; based on the target image, constructing a multi-scale feature map of the Mura defect, the multi-scale feature map comprising a local mean map and a local variance map under multiple scales: performing adaptive weight fusion on the local mean map and the local variance map to obtain a confidence map of the Mura defect; according to the confidence map, utilizing morphological operation to extract a suspected defect area; performing shape analysis and contrast analysis on the suspected defect area to obtain shape features and contrast features of the suspected defect area; and screening out a target Mura defect region from the suspected defect region based on the shape feature and the contrast feature. By implementing the technical scheme provided by the invention, the accuracy of Mura defect detection is improved.
Owner:ALTRON OPTOELECTRONICS (SHENZHEN) CO LTD

Method for forming CMOS image sensor and CMOS image sensor

ActiveCN112542474Breduce areaEliminate areaCMOSTesting Methods
The present invention provides a method for forming a CMOS image sensor and a CMOS image sensor, wherein the CMOS image sensor comprises: a transfer transistor, a reset transistor, and a composite transistor; the composite transistor is composed of a source follower transistor and a row gate transistor, and is used to realize the functions of the source follower transistor and the row gate transistor; wherein the gate region of the composite transistor is a two-gate structure, and the two gate structures are directly spaced by an oxide layer, so that the speed of the device can be improved while saving area.
Owner:SINO IC-LEASING CO LTD

A method for three-dimensional fine modeling and stability probability evaluation of complex rock mass block

PendingCN122286920AEfficient automatic generationGuaranteed Computational EfficiencyProbit modelTerrain
This invention discloses a method for three-dimensional fine modeling and stability probability evaluation of complex rock mass blocks, comprising three steps: first, three-dimensional modeling of complex blocks based on three-dimensional laser scanning, integrating real high-precision terrain and random boundaries; second, introducing full-space stereographic projection for kinematic mobility prediction, inputting the extracted random geometric parameters into a rigid body limit equilibrium vector model considering water-rock coupling effects such as pore water pressure reduction, and calculating the probability distribution of the safety factor; and third, based on a multi-source collaborative support inversion model of target reliability, dynamically calculating and outputting the probability distribution of anchor cable reinforcement force required to maintain the target's stable state. This invention overcomes the inherent defects of traditional deterministic analysis and simplified probabilistic models, and overcomes the shortcomings of existing technologies that often use fixed attitude parameters and are difficult to detect potential risks.
Owner:CHINA HYDROELECTRIC ENGINEERING CONSULTING GROUP CHENGDU RESEARCH HYDROELECTRIC INVESTIGATION DESIGN AND INSTITUTE