Low offset comparator and offset cancellation method thereof
A technology of offset elimination and comparator, applied in multiple input and output pulse circuits, etc.
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[0031] Then, in a tracking mode, the series input offset storage stages 321-32N, the second output offset storage stage 330 and the first output offset storage stage 310 are sequentially separated from the offset elimination mode, and then the preamplifier 305 amplifies the input voltage Vin. The input offset and the output offset stored in the offset cancellation mode are respectively canceled with a plurality of offset voltages generated by the low offset comparator 300 . Afterwards, in a latch mode, the latch 340 is triggered (strobe) by the amplified input signal output by the pre-amplifier 305, and accordingly outputs a logic level Vout, which is an identifiable voltage level.
[0032] The first output offset storage stage 310 includes a first rail-to-rail amplifier 3101, 2 first output offset storage Co1, 2 first output offset storage switches Soos1, and 2 first switches S1. The first rail-to-rail amplifier 3101 has 2 input terminals and 2 output terminals. The first...
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