Data frame storage management device

Abstract

The invention discloses a data frame storage management device, and relates to data frame processing technology. The data frame storage management device comprises three parts, namely an inlet fragmentation device, a fragmentation write and read device and a sub-unit management device of a public storage, wherein the inlet fragmentation device caches a data stream, extracts the data stream in a fragmentation mode into fragmented data and sends the fragmented data to the fragmentation write and read device; the fragmentation write and read device writes the fragmented data into the storage according to sequence signals of a timing control circuit, or reads the fragmented data from the storage; and the sub-unit management device of the public storage controls the read-write operation of the fragmentation write-in and read-out device. The data frame storage management device divides the storage into a plurality of basic storage units which serve as basic units for storage, can be allocated with addresses based on a source port and also can be allocated with addresses in a sharing way, the independent use of the addresses is achieved by applying for a release mechanism, the write and read of the data are completed by adopting a sequence isolation method, and the conflict between the read and write is avoided, so the circuits of the whole system are realized simply.

Description

technical field [0001] The invention relates to a data frame processing technology, in particular to a data frame storage management device. Background technique [0002] The data frame storage management device in the storage device is closely related to the system's data processing capability, bandwidth utilization, and performance stability. At present, there are various data frame storage management devices and storage methods, all of which have different characteristics, but most of them still have the following defects in the specific circuit design: [0003] 1. Fixed allocation of address space. The data of the data frame is bursty, the packet length and rate are not fixed, and the amount of data that each port needs to store is different. The fixed allocation address space cannot achieve the address sharing of each port, and obviously the storage space cannot be fully utilized. [0004] 2. Continuous address storage in units of frames also depends on the relatively...

AI Technical Summary

Problems solved by technology

The data of the data frame is bursty, the packet length and rate are not fixed, and the amount of data that each port needs to store is different. The fixed allocation of address space cannot achieve the address sharing of each port, and obviously the storage space cannot be fully utilized.

[0004] 2. The continuous storage of addresses in units of frames also depends on the relatively fixed allocation of addresses, which is not conducive to the flexible use of addresses

Parallel processing is relatively simple in logic, but each port requires a set of independent circuits, and the scale is relatively large.

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