Design and realization method of array multiplier based on reversible 'ZS' series gate

An implementation method and multiplier technology, applied in the field of quantum information, can solve the problems of reducing the operating power consumption and design cost of computing components, not being easy to multiply operations with signed numbers, and not easy to expand, etc.

Inactive Publication Date: 2010-12-22
EAST CHINA JIAOTONG UNIVERSITY
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Problems solved by technology

Simultaneously, utilize the " reversible optimization " of this series of gate design (the present invention defines and use reversible logic gate quantity and kind and the circuit with the least useless output quantity to be " reversible optimization " circuit) array multiplier, this kind of array multiplier has overcome The shortcomings of traditional quantum multipliers that are not easy to expand and complete the multiplication operation of signed numbers greatly reduce the operating power consumption and design cost of computing components

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  • Design and realization method of array multiplier based on reversible 'ZS' series gate
  • Design and realization method of array multiplier based on reversible 'ZS' series gate
  • Design and realization method of array multiplier based on reversible 'ZS' series gate

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[0108] The "ZS1", "ZS2", and "ZS3" gate representations of the new reversible series "ZS" gates designed by the present invention are as follows Figure 7 , Figure 11 and Figure 15 is shown, and its corresponding truth table is given at the same time. In the truth table, there is a one-to-one relationship between input and output. Given the input, the output can be determined, and at the same time, the given output can get its only input. It can be verified that the series of "ZS" gates meet the reversible requirements.

[0109] The circuit design diagram of the reversible gate containing the double-qubit controlled gate and the single-qubit gate designed according to the series "ZS" gate of the present invention is as follows Figure 8 , Figure 12 and Figure 16 shown.

[0110] Figure 8 The corresponding modules are listed in, Figure 8 Among them, ①, ②, ③, and ④ are the modules required to form the "ZS1" gate, and 1, 2, 3, and 4 represent the output of No. 1, No. ...

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Abstract

The invention relates to a design and realization method of an array multiplier based on the reversible 'ZS' series of gates. The method establishes a one-to-one relationship between the reversible definitions in a quantum computer and the inputs or outputs in a truth table and designs a series of reversible logic gates-'ZS1', 'ZS2' and 'ZS3' gates, which have the one-to-one relationship with theinputs or outputs in the truth table, and a quantum circuit diagram of the series of gates only containing double-quantum bit controlled gate and single bit gate. The method is based on Toffoli gate and designs three adding circuits which receive different symbol inputs and obtain the corresponding symbol outputs; the method is based on the 'ZS' series of gates and designs a multiplication circuit structure with the best reversible optimization, namely a quantum array multiplier. The reversible array multiplier can adopt a method similar to the manual calculation to complete the multiply operation with symbolic number in a higher computing speed; and the regularity of the internal structure is high and the internal structure is easy to extend. The design and realization method of the invention is applicable to the circuit design and application of the quantum system and realizes a certain promotion to the design and realization of the quantum large scale integrated circuits.

Description

technical field [0001] The invention relates to a design and implementation method of an array multiplier based on reversible "ZS" series gates, belonging to the field of quantum information technology. Background technique [0002] Quantum computers are built from quantum circuits consisting of wires and elementary quantum gates arranged to process quantum information. Compared with classical electronic computers, quantum computers have many attractive advantages: increased storage capacity; reversible calculation process reduces energy consumption; especially in some problems such as prime factorization of large numbers and disordered database searches, quantum computers can make the time spent It is greatly shortened and has incomparable advantages over classical electronic computers. [0003] In quantum information theory, a qubit is a two-dimensional Hilbert space (Hilbert), and its state can fall outside |0> and |1>, that is, a superposition state, which can be ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/53
Inventor 周日贵施洋
Owner EAST CHINA JIAOTONG UNIVERSITY
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