44 results about "Symbolic number" patented technology

The embodiment of the invention provides a data transmission method which comprises the following steps: obtaining a symbolic number N of orthogonal frequency division multiplexing OFDM occupied by a physical downlink control channel domain; sending a control signaling to the user equipment UE, wherein the control signaling comprises N; and according to the N, mapping an expanded control channel and/or a data channel in a resource position of a physical downlink shared channel PDSCH and sending control information and/or data on the expanded control channel and/or data channel. According to the embodiment of the invention, the UE can obtain the symbolic number N of OFDM occupied by a conventional control channel domain and expands a time frequency domain resource mapping mode of the control channel in the data channel, so that the utilization ratio of the time frequency resources is improved.

The invention relates to a design and realization method of an array multiplier based on the reversible 'ZS' series of gates. The method establishes a one-to-one relationship between the reversible definitions in a quantum computer and the inputs or outputs in a truth table and designs a series of reversible logic gates-'ZS1', 'ZS2' and 'ZS3' gates, which have the one-to-one relationship with theinputs or outputs in the truth table, and a quantum circuit diagram of the series of gates only containing double-quantum bit controlled gate and single bit gate. The method is based on Toffoli gate and designs three adding circuits which receive different symbol inputs and obtain the corresponding symbol outputs; the method is based on the 'ZS' series of gates and designs a multiplication circuit structure with the best reversible optimization, namely a quantum array multiplier. The reversible array multiplier can adopt a method similar to the manual calculation to complete the multiply operation with symbolic number in a higher computing speed; and the regularity of the internal structure is high and the internal structure is easy to extend. The design and realization method of the invention is applicable to the circuit design and application of the quantum system and realizes a certain promotion to the design and realization of the quantum large scale integrated circuits.

The invention discloses an allocation method, a device and a base station for the physical downlink control channel time domain symbolic number, relating to the communications field. The invention allocates the time domain symbolic number for the physical downlink control channel of the transmission time interval which needs scheduling based on the application circumstance of the time domain symbolic number which is allocated by the physical downlink control channel of the former M history transmission time interval and the time domain symbolic number which is allocated by the physical downlink control channel of the previous transmission time interval so as to decrease the waste of the physical downlink control channel resource and the physical downlink shared channel frequency domain resource.

The invention discloses an adder/subtractor for the signed number of centralized sequences based on the probability calculation and belongs to the field of integrated centralized sequences. The invention aims to solve the problem of how to provide a signed adder/subtractor based on centralized sequences. The method is mainly used for carrying out addition or subtraction operation on two n + 1-bitbinary symbolic numbers, and one n + 1-bit binary symbolic number is composed of a one-bit symbolic bit SA and a number bit corresponding to an n-bit binary number A; the other (n + 1)-bit binary signed number is composed of a one-bit sign bit SB and a number bit corresponding to an n-bit binary number B; and the symbol determination module obtains an operation mode according to the received signbits SA and SB, and performs addition or subtraction operation on the two n + 1 binary signed numbers according to the determined operation mode. The method is mainly suitable for neural network calculation and other occasions including a large number of multiplication operations and a large number of accumulation operations.

The invention discloses a method for data processing, a network device and a terminal. According to the method, a sending end merges basic modulation symbols which are obtained after the sending end respectively carries out basic modulation on data of each layer in order to obtain a merged symbol vector X, and a transmitting end maps the symbol vector X on Q resource units to obtain a data vector S, wherein the symbolic number of the symbol vector X is greater than the symbolic number in the data vector S, the symbolic number in the data vector S is Q and Q is a positive integer. According to the method for data processing, the network device and the terminal, the non-orthogonal spread spectrum superposition transmission of multiple terminals can be realized in uplink and downlink and the transmission efficiency is effectively increased.

The invention is applicable to the field of deep space communication, and provides a deep-space-communication-oriented cross-layer joint file transmission method. An image is compressed by adopting a CS (chirp scaling) algorithm in the transmission process of the image, so that the image can be jointly optimized with the Spinal code of a bottom layer and then is transmitted; a cross-layer joint transmission mechanism refers to that the CS image compression of an application layer, the CS erasure correction of a transmission layer and the Spinal code of a data link layer/physical layer are jointly optimized and a transmission mechanism is designed in combination with an LTP (Licklider transmission protocol), and after finishing sending certain data, a sending end determines a symbolic number to be sent at a next moment through Markov prediction and feedback information without waiting for feedback. After receiving the feedback, the sending end pauses sending the data, processes the feedback, and additionally sends the symbolic number aiming at a coding block with an error, and the additionally sent symbolic number is decoded together with the symbolic number sent before. On the premise that certain reliability is guaranteed, the effectiveness of a system is improved.

The invention discloses a decoding method of a Raptor code. In the prior Raptor decoding technology, more symbolic numbers are received for ensuring the high probability for one-time decoding success and the whole decoding process requires to be restarted once the decoding is unsuccessful. The method provided by the invention can be used for starting decoding from successfully-decoded least symbols; and if the decoding is unsuccessful, one new symbol only needs to be continuously received and the decoding continues by using the failed decoding result until the decoding is successful. The invention solves the problem that the Gaussian elimination of the decoding algorithm in the prior art damages the linear relation of a matrix. The improved method has simple flow and small expenditure, enhances the decoding instantaneity and greatly enhances the practicability.

The invention discloses a symbol interleaving method. The symbol interleaving method includes the steps that after current data needing to be transmitted to user equipment are converted into symbol sequences, the symbol sequences are sequentially written into a matrix by columns to obtain an initial matrix, wherein the row number R of the initial matrix is an OFDM symbolic number Nsymbol corresponding to the symbol sequences, and the column number C of the initial matrix is the product of the number Ncarrier of subcarriers occupied by OFDM symbols and the number Nsubs of sub-bands occupied by the symbol sequences; according to the formula: P(j)=P1(j, Ncarrier, Nsubs)+P2(j, Ncarrier), column permutation is carried out on the initial matrix to obtain a column permutation matrix, wherein P(j) is the column number of the j column, in the initial matrix, of the column permutation matrix, P1(j, Ncarrier, Nsubs)=pi (mod (j, Ncarrier)) * Nsubs, pi() is a preset permutation function, P2(j, Ncarrier) meets a formula (please see the formula in the specification), and according to a formula (please see the formula in the specification), permutation is carried out on the column permutation matrix to obtain an interleaved matrix, wherein Q(i) is the row number of the i row, in the column permutation matrix, of the interleaved matrix; symbols in the interleaved matrix are sequentially output by rows to obtain interleaved symbol sequences. The symbol interleaving method is suitable for the LTE 230 system.

The invention discloses a 48*30 bit multiplier based on a Booth algorithm. The multiplier comprises a Bit displacement control mode, a partial product generator, a linear accumulation controller and a partial product linear accumulator. According to the invention, partial products are firstly generated by the multiplier and then accumulated and summed to realize the multiplying operation of 48*30 bits, wherein the partial products are generated by using a Radix-4Booth algorithm and are processed in a linear summing manner, so that the number of the partial products to be summed is reduced greatly. Therefore, a clock period required for realization of the multiplying operation is shortened, and the algorithms of multiplication with symbolic numbers and without symbolic numbers are unified. As a result, the traditional serial multiplier and the traditional parallel multiplier for processing the consumption of bandwidth and hardware resources are compromised. Consequently, the hardware resource consumption in design is lowered greatly and the cost is saved obviously on the basis that the multiplier with a high bit width satisfies the requirement of the bandwidth speed of system design.

The invention discloses a configuration method of special subframes of a TD-LTE electric wireless private network. The configuration method comprises the following steps that 1, the required GP length TGP is met according to the covering radius of a cell and far-end interference configurations; 2, the symbolic number R occupied by a control signal in a UpPTS time slot is determined according to the situation that PRACH or user number is used or not; 3, the total symbolic number in each special subframe is set as Q, the vale of Gibson = Q-TGP-R-3 is calculated, and if the Gibson is smaller than half of the subframe length, the residual symbolic number is configured to the DwPTS time slot length; if Gibson is larger than or equal to half of the subframe length, a special subframe time slot configuration scheme is designed as follows: (1) a DwPTS time slot occupy 3 OFDM symbols; (2) the length of a guard interval GP is TGP; (3) the residual symbolic number is configured to the UpPTS time slot length. The utilization rate of network bandwidth and the stability of the network are improved.

The invention provides a data processor, a method, a chip and electronic equipment. The data processor comprises a first multiplication circuit, a second multiplication circuit and a partial product switching circuit. The first multiplication circuit comprises a first correction coding sub-circuit and a first correction compression sub-circuit. The second multiplication operation circuit comprisesa second correction coding sub-circuit and a second correction compression sub-circuit. The data processor can perform regular symbolic number coding processing on the received data, so that the number of obtained effective partial products is relatively small. The complexity of realizing multiplication operation or multiply-accumulate operation by the data processor is reduced.

The invention discloses an E-PDCCH-based downlink control information acquisition method, device and terminal, and relates to the technical field LTE. The method provides a high-level signaling indication scheme of dynamically indicating an addressing signaling update node moment by a PCFICH, when the high-level signaling is transmitted to UE high-level E-PDCCH addressing indication information through a PDSCH; and after an instruction update, when the PCFICH indicates that the symbolic number of the PDCCH is a preassigned value, eNB and UE perform addressing according to recently updated high-level addressing signaling. The method, device and terminal implicitly solve the problem that the E-PDCCH high-level addressing signaling has an instruction fuzzy period, solve the problem of inconsistency of addressing information between UE and eNB which may occur in the instruction fuzzy period, reduces circumstances that E-PDCCH channel information cannot be correctly analyzed in the fuzzy period which are brought by the problem, and reduces corresponding resource waste.

The invention provides a multiplier, a data processing method, a chip and electronic equipment. The multiplier comprises a regular signed number encoding circuit, a compression tree group circuit andan accumulation circuit, the output end of the regular signed number encoding circuit is connected with the input end of the compression tree group circuit; the output end of the compression tree group circuit is connected with the input end of the accumulation circuit; the multiplier can compress a partial product of a target code through the compression tree group circuit to obtain a target operation result, and can perform regular symbolic number coding on received to-be-processed data to reduce the number of effective partial products in multiplication so as to reduce the complexity of multiplication.

The invention discloses a subframe configuration method and device. The device comprises the step that a base station determines a backhaul subframe and configuration information in access to the subframe according to a preset parameter. The configuration information comprises the overhaul subframe and an index number of an OFDM symbol in access to the start and the end of the subframe, the preset parameter comprises at least one of a symbolic number occupied by physical downlink control information sent by the base station, a bearing mode of a downlink control channel of an LS wireless device on a backhaul link, a bearing mode of the downlink control channel of the LS wireless device on an access link, and the parameter whether the cooperative transmission is carried out between the base station and the LS wireless device or not. The base station informs the LS wireless device of the backhaul subframe and the configuration information in access to the subframe. The subframe configuration method and device can avoid the interference between cellular communications and LS wireless device communications.

The invention provides a multi-modulation transmission system and a data frame filling method thereof, which relate to the field of digital information transmission, wherein the data frame filling method of the multi-modulation transmission system performs data frame filling after channel coding and mapping, and the data frame filling comprises single-carrier time-domain processing and multi-carrier frequency-domain processing and comprises the following steps: selecting the single-carrier time-domain processing or the multi-carrier frequency-domain processing by a time-domain or frequency-domain selecting module; according to the selection result, performing the processing of inserting reference information on data requiring the single-carrier time-domain processing, wherein the symbolic number of the inserted reference information is L; and according to the selection result, performing the processing of inserting pilot signal or strongly protected unknown information on the data requiring the multi-carrier frequency-domain processing, wherein the symbolic number N of the inserted pilot signal or the strongly protected unknown information is equal to the symbolic number L of the inserted reference information, and the output data are processed by discrete Fourier inverse transform.

The invention discloses a method for mapping symbolic numbers on a memristor array, and the method comprises the steps: directly mapping the symbolic numbers on the memristor array in a complement expression form, and obtaining a mapping scheme according to the bit widths of different mapping numbers and the precision of memristors. Firstly, whether a current memristor type device is binary or multi-valued needs to be confirmed, and if the current memristor type device is a multi-valued device, the unit precision needs to be confirmed; then, the bit width of the mapped symbolic numbers is determined, and the symbolic numbers are converted into binary numbers in a complement form; and finally, a symbolic number mapping scheme is acquired. The method is suitable for neural network calculation, consumption of memristor resources occupied by the mapped symbolic numbers of the method is small, universality is high, and the numerical value coverage range is the same as the actual expression range.

The invention discloses a realization circuit for a squarer, which comprises: an acquisition module that is used to acquire a mutual multiply item, square item and supplement item according to the input symbolic number during the squaring process; a first sum module that sums up the mutual multiply item attained by the acquisition module and generates a first sum result; a second sum module that sums up the first sum result attained by the first sum module and the square item attained by the acquisition module and generates a second sum result; a third sum module that sums up the second sum result attained by the second sum module and the supplement item attained by the acquisition module and generates a third sum result; a combination module that combines the third sum result attained by the third sum module and a lower 2bit digit and generates a square result for the symbolic number. Therefore, the invention simplifies the circuit structure for realizing the squarer and greatly saves the circuit resources.

The embodiment of the invention discloses a method for extracting numbers in an E-mail and a device thereof. The method comprises the steps that a single symbol in the E-mail is identified, and an identified result is obtained; classification determination is conducted on the identified result to obtain a determined result; the determined result is converted to obtain a pure digital number string. According to the method for extracting the numbers in the E-mail and the device thereof, numbers with separators and symbolic numbers in the subject or the content of the E-mail can be identified, the hybrid numbers are converted into the pure digital number string, the difficulty for extracting the numbers can be lowered, and the consumption of resources is lowered. Analysis of an anti-spam module and rule application in the E-mail are facilitated, so that whether the E-mail is a junk E-mail or not is quickly identified, and convenience is brought to a user.

The invention provides a multiplier, a data processing method, a chip and electronic equipment. The multiplier comprises a multiplier unit; judgment circuit, a data expansion circuit, a regular sign number encoding circuit and a compression circuit. The output end of the judgment circuit is connected with the input end of the data expansion circuit. The output end of the judgment circuit is connected with the first input end of the regular signed number encoding circuit. The output end of the data expansion circuit is connected with the second input end of the regular symbolic number encodingcircuit. The output end of the regular signed number encoding circuit is connected with the input end of the compression circuit. The multiplier can carry out regular signed number encoding on received data through the regular signed number encoding circuit. The number of obtained effective partial products is small. Therefore, the complexity of multiplication operation achieved by the multiplieris reduced.