Novel OTP implementation method

Abstract

The invention relates to a novel OTP (One Time Programmable) implementation method. A part of memory area of a SOC (System On Chip) integrated nonvolatile memory module and a method for combining hardware with system software are adopted to implement two functions below: 1, a memory space for serial numbers is set aside in the memory area of the nonvolatile memory module, and a user cannot write, but only read in the memory space, and unique serial numbers are written in the memory space during chip test; and 2, a special area is partially set aside in the memory area of the nonvolatile memory module, the method for combining hardware with system software is adopted to ensure that the user completes write lock through user configuration parameters when completing write operation for the special area, and once the write operation is locked, the chip cannot modify the write operation-locked area after being re-electrified. The method has the advantages that: the integration of a third-party OTP memory is not required, the chip design complexity is reduced, and the cost is lowered since independent test for OTP is not required during chip test.

Description

technical field [0001] The invention relates to the field of IC design, in particular to a novel OTP realization method. Background technique [0002] When users develop products, they often need the products they develop to be easy to manage. In this way, it is generally required that the chips in the products have unique serial numbers to facilitate the management of their own products. The cost pressure among similar products is gradually increasing, requiring all parties in the product chain to continuously find ways to reduce costs. This point applies to chip design, which requires that the cost should not be increased or even reduced as much as possible. More can be done with existing resources. The cost of a well-functioning chip includes many links. Corresponding to the design stage, it is necessary to use as few logic gates as possible to complete the required functions (the area of ​​the chip is related to the cost of the chip, and the larger the area of ​​a singl...

AI Technical Summary

Problems solved by technology

The shortcomings of its technology are: 1. When designing the chip, it is necessary to integrate the OTP memory of the third party, which increases the complexity of the chip design; 2. The cost of the chip design will increase if the OTP memory of the third party is added (OTP needs to occupy the chip area), because the OTP memory is an independent memory, so the OTP needs to be tested independently when the chip is tested, so the cost of the test will also increase

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