Method for collecting and storing dynamic parameters based on two-stage pipeline ADC

A two-level pipeline and dynamic parameter technology, which is applied in the direction of electrical digital data processing, memory address/allocation/relocation, instruments, etc., can solve problems such as delay and data storage delay, so as to avoid the trouble of post-processing and facilitate data processing. Effects of processing and analysis

Inactive Publication Date: 2013-04-17
SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP
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  • Abstract
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  • Application Information

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Problems solved by technology

See attached figure 1 As shown, if the channel selection signal is determined by the lower two bits of the address of the memory, without address processing, it will cause the data storage to be delayed by two addresses at the fastest acquisition rate
However, at half the acquisition rate of the fastest rate, the data storage will be delayed by one address. Only when the acquisition rate is low enough, the data can be correctly stored in the corresponding address.

Method used

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  • Method for collecting and storing dynamic parameters based on two-stage pipeline ADC
  • Method for collecting and storing dynamic parameters based on two-stage pipeline ADC
  • Method for collecting and storing dynamic parameters based on two-stage pipeline ADC

Examples

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Embodiment 1

[0030] Embodiment one: see attached figure 2 And attached image 3 shown.

[0031] A device for acquiring and storing dynamic parameters based on a two-stage pipeline ADC, the realization circuit of which includes:

[0032] The two-stage pipeline ADC converts the sampled analog signal into a digital signal;

[0033] The channel selector selects the channel input to the analog input terminal of the second-stage pipeline ADC; the lower two bits of the current address are used as the channel selection signal of the channel selector. The channel selector has four channels, namely AIN0, AIN1, AIN2, AIN3;

[0034] Memory MEMORY, used to store addresses and data;

[0035] The first cache module BUF0 is used for caching addresses,

[0036] The second cache module BUF1 is used for caching addresses,

[0037] The address cache module ADDR BUF is used to cache the write address of the memory MEMORY,

[0038] The read pointer module RP determines the address to be read into the fi...

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Abstract

The invention relates to a method for collecting and storing dynamic parameters based on a two-stage pipeline ADC, comprising the following steps of: (1) sampling and converting the two-stage pipeline ADC to acquire data; and (2) storing the data in a memory; through the link of address processing between the data acquired by sampling and converting the two-stage pipeline ADC and the data storingmemory, the converted data of the two-stage pipeline ADC can be accurately and quickly accessed in corresponding memory address no matter how the sampling rate is, so that the data is processed and analyzed in later period conveniently, thus preventing the trouble of post-processing.

Description

technical field [0001] The invention relates to a device for collecting and storing dynamic parameters based on a two-stage pipeline ADC. Background technique [0002] In the general parameter acquisition process, in order to increase the acquisition rate as much as possible, the ADC used is a two-stage pipeline structure. According to the structure of the two-stage pipeline ADC, the analog signal enters the ADC from the analog input terminal and is triggered by the ADC conversion signal, and the ADC of the two-stage pipeline structure performs digital-to-analog conversion on it. First convert the high-order part of the data. After the conversion of the high-order data is completed, the subtractor inside the ADC subtracts the sampling voltage from the converted high-order data voltage to obtain the voltage used to convert the low-order part of the data. At this time, the ADC can receive the conversion signal for the next sampling. If the ADC works at the fastest rate, the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/08G06F13/16
Inventor 王少轩刘德状贺克军王丽武凤琴龙善丽
Owner SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP
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