Sigma-delta converters and methods for analog-to-digital conversion

Abstract

A switched capacitor sigma-delta modulator or another analog-to-digital converter (ADC) uses chopper stabilization. Chopping clock transitions are performed during non-active periods of the sampling clock phases, reducing disturbance of the circuit caused by chopping and increasing the time available for settling of the circuit given a particular sampling frequency. An asynchronous state machine may govern sampling and chopping clock transitions. In embodiments, inactive transition of a first sampling clock causes inactive transition of a second chopping clock, which in turn causes active transition of a first chopping clock. The next inactive transition of the first sampling clock causes inactive transition of the first chopping clock, which causes an active transition of the second chopping clock.

Description

technical field [0001] The devices and methods described in this document relate to electronic circuit design. More particularly, the devices and methods relate to chopper stabilized analog-to-digital converters and sigma-delta modulators. Background technique [0002] Sigma-delta modulators and other types of analog-to-digital converters (ADCs) are widely used in communication systems and many other applications. In communication systems, for example, such devices can be used to convert intermediate frequency (IF) signals to baseband frequency signals to meet the dynamic range requirements of digital signal processing and provide improved adaptability and programmability to receiver circuits . Advantages of sigma-delta modulators include high dynamic range, which is often required to distinguish small desired signals from blocking and interfering signals. The sigma-delta modulator shapes out-of-band quantization noise and allows combining decimation filtering with select...

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