High efficiency high accuracy division implementation method and device
An implementation method and high-precision technology, which is applied in the direction of instruments, electrical digital data processing, and digital data processing components, can solve problems such as slow implementation speed, long clock cycle, and application limitations in the field of digital signal processing, so as to improve accuracy, High speed and precision, avoiding the effect of excessive error
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[0040] As an optional implementation, it also includes:
[0041] Steps of abnormal judgment: if the divisor x' is 0, then abnormal processing is required, output a maximum constant constant, and output an abnormal processing flag, and end the operation. In general, this step does not need to be performed, but only when the divisor x' is 0, this step is performed.
[0042] The steps of the above symbol judgment, the steps of abnormal judgment and the selected system bit width Bw are not limited in the execution sequence, that is to say, the steps of symbol judgment can be executed first, and then the steps of abnormal judgment and the selected system bit width Bw can be executed , the system bit width Bw can also be selected first, and then the step of symbol judgment and the step of abnormal judgment can be executed, as well as executed in other orders, and then, all or part of the steps can also be performed as required.
[0043] Step 402, decomposing the equation:
[0044]...
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