Cache system and method

Abstract

The present invention provides a caching system and method. When the present invention is applied in the field of processors, an instruction can be filled, before being executed by a processor core, in a high-speed memory directly accessible by the processor core, and without providing the address of the instruction by the processor core, the high-speed memory can be controlled to provide the instruction to the processor core directly according to feedback information generated by instruction execution of the processor core, so that the processor core can acquire the required instruction from the high-speed memory nearly every time, thereby achieving an extremely high cache hit rate.

Description

technical field [0001] The invention relates to the fields of computer, communication and integrated circuit. Background technique [0002] Usually, the function of the cache is to copy part of the content in the lower-level memory, so that the content can be quickly accessed by the higher-level memory or the processor core, so as to ensure the continuous operation of the pipeline. [0003] The addressing of the current cache is based on the following method, use the index segment in the address to address the tag in the read tag memory and match the tag segment in the address; use the index segment in the address and the displacement segment in the block to jointly address the read cache in the content. If the tag read from the tag memory is the same as the tag segment in the address, then the content read from the cache is valid, which is called a cache hit. Otherwise, if the tag read from the tag memory is not the same as the tag segment in the address, it is called a c...

AI Technical Summary

Problems solved by technology

However, with the widening processor / memory speed gap, the current architecture, especially multiple cache misses, has become the most serious bottleneck restricting the performance improvement of modern processors

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