In-pixel storage unit, in-pixel data storage method, and pixel array

An internal storage and data latching technology, applied in nonlinear optics, static indicators, instruments, etc., can solve the problems of low yield, increased product cost of MIP display technology, and complex process.

Active Publication Date: 2017-09-15
BOE TECH GRP CO LTD +1
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Problems solved by technology

[0003] However, the current MIP display technology is basically a CMOS LTPS process, and the memory cells in the pixels in the MIP display technology are all composed of CMOS circuits. This process is complex and has a low yield rate, which greatly increases the cost of MIP display technology products and limits Process compatibility and application range of MIP display technology

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  • In-pixel storage unit, in-pixel data storage method, and pixel array
  • In-pixel storage unit, in-pixel data storage method, and pixel array
  • In-pixel storage unit, in-pixel data storage method, and pixel array

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[0065] According to the first embodiment of the present invention, the storage unit MIP in the pixel is composed of NMOS transistors, and according to the second embodiment of the present invention, the storage unit MIP in the pixel is composed of PMOS transistors.

[0066] Figure 6A According to the first embodiment of the present invention Figure 3B The schematic circuit diagram of the in-pixel memory cell MIP is shown. In the first embodiment of the present invention, the active levels of the first control signal and the second control signal are high level, and the active level of the driving node M is also high level.

[0067] like Figure 6A As shown, the data input circuit includes a first input transistor T11 and a second input transistor T12.

[0068] The gate of the first input transistor T11 is connected to the first control signal terminal S1, the first pole is connected to the data line DATA, and the second pole is connected to the first data latch terminal I...

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Abstract

Disclosed are a storage unit in a pixel, a data storage method, and a pixel array. The memory unit in the pixel includes: a data input circuit configured to read the data voltage on the data line to the first data latch terminal and the second data latch terminal when the first control signal at the first control signal terminal is at its active level. On the data latch end; a first data latch circuit configured to maintain the level of the first data latch end; a second data latch circuit configured to maintain the electrical level of the second data latch end level; a drive control circuit configured to make the level of the drive node opposite to the level of the first data latch terminal; and a drive circuit configured to set the third A third supply voltage at the supply voltage terminal is output to the output terminal and a fourth supply voltage at the fourth supply voltage terminal is output to the output terminal when the second data latch terminal is at its active level.

Description

technical field [0001] The present invention relates to storage of data voltage in a pixel, and more particularly to a storage unit in a pixel, a method for storing data in a pixel, and a pixel array. Background technique [0002] At present, with the development of technologies such as smart wear and mobile applications, higher requirements are put forward for the development of ultra-low power consumption liquid crystal LCD display technology. Memory in Pixel (MIP) display technology, as a new type of low-power LCD display technology, has broad development prospects due to its characteristics of no need to change the LCD process, no need to develop new materials, simple structure, and low cost. [0003] However, the current MIP display technology is basically a CMOS LTPS process, and the memory cells in the pixels in the MIP display technology are all composed of CMOS circuits. This process is complex and has a low yield rate, which greatly increases the cost of MIP displa...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): G09G3/36
CPCG09G3/3688G09G3/3696G09G3/3648G09G2300/0857G02F1/13306G02F1/1343G09G3/36G09G2310/0264
Inventor谭文陈佳
OwnerBOE TECH GRP CO LTD