Optimizing Method for Simultaneous Running of Multiple Threads in Multiprocessor System on Chip

An on-chip multi-processor, optimization method technology, applied in the multi-processor field, which can solve problems such as CMP damage and temperature increase

Active Publication Date: 2019-02-19
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the increase in the number of cores also brings problems: if all the cores of the CMP are activated at the same time, the overall power consumption of the CMP system may exceed the TDP (thermal design power consumption). The range of loading, if not cooled, the temperature will rise further, causing damage to the CMP

Method used

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  • Optimizing Method for Simultaneous Running of Multiple Threads in Multiprocessor System on Chip
  • Optimizing Method for Simultaneous Running of Multiple Threads in Multiprocessor System on Chip

Examples

Experimental program
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Effect test

Embodiment

[0036] The following uses sniper, hotspot and mcpat as a co-simulation platform to conduct experiments at various voltages / frequency:

[0037] The upper limit temperature of the experiment setting is 80 degrees Celsius, the lower limit temperature is 50 degrees Celsius, and the TDP value is about 42W. After the temperature of the CMP in the sprinting mode reaches the upper limit, it switches to the rest mode, and after the temperature cools down to the lower limit temperature, it switches to the sprinting mode again. The experiment was carried out under the experimental conditions shown in Table 1, and the experimental statistics are shown in Table 2, where Inf indicates that the CMP can continue to operate under the current voltage / frequency. The first five rows of Table 2 are the statistical data obtained by running the program at the preset DVFS level, and the last row is the statistical data of the operation when the best frequency or voltage is found.

[0038] Table 1 Ex...

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Abstract

The invention discloses an optimization method for multi-thread simultaneous operation of an on-chip multiprocessor system. The method includes obtaining the dynamic voltage and frequency scaling level at which the heat dissipation design power consumption of the on-chip multiprocessor system is located; When the minimum power of the level is obtained, the frequency value of the multi-processor system currently trying to run simultaneously with multiple threads is obtained; the difference between the frequency value of the current attempt to run multiple threads at the same time and the thermal design power consumption is calculated; when the difference is greater than the preset accuracy, Use the frequency value of the current attempt to run multiple threads simultaneously and the cumulative value of the preset step to update the frequency value of the current attempt to run multiple threads simultaneously; when the difference is less than or equal to the preset accuracy, output the frequency value of the current attempt to run multiple threads simultaneously as the on-chip The frequency at which multiple threads run simultaneously on a multiprocessor system.

Description

technical field [0001] The invention relates to the technical field of multiprocessors, in particular to an optimization method for simultaneous operation of multithreads in an on-chip multiprocessor system. Background technique [0002] With the development of computer technology, CMP (on-chip multiprocessor) has gradually become the mainstream with its powerful parallel processing capability, and the parallel processing capability of CMP is also gradually improved with the increase of the number of integrated cores. However, the increase in the number of cores also brings problems: if all the cores of the CMP are activated at the same time, the overall power consumption of the CMP system may exceed the TDP (thermal design power consumption). The range of loading, if not cooled, the temperature will rise further, causing damage to the CMP. [0003] In order to improve the response speed of the CMP internal program, some researchers have proposed a short-term sprinting (mul...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
CPCG06F9/3851
Inventor 陈哲牟江王坚李桓李玉柏
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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