Data information sorting method, CPU side, FPGA side and system

A technology of data information and sorting method, applied in the computer field, can solve the problem of limited improvement of the quick sorting algorithm, and achieve the effect of reducing the running time of the algorithm, improving the throughput performance, and improving the degree of parallelism.

Active Publication Date: 2017-11-24
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the improvement of this technology is carried out in the existing CPU hardware environment,

Method used

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  • Data information sorting method, CPU side, FPGA side and system
  • Data information sorting method, CPU side, FPGA side and system
  • Data information sorting method, CPU side, FPGA side and system

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Embodiment Construction

[0065] The core of the present invention is to increase the FPGA end on the basis of the existing quick sorting algorithm to be responsible for the core operation of the quick sorting algorithm, and the original host end, that is, the CPU end, as the control end, so that the powerful data parallel processing of the FPGA end can be used Ability to improve the parallelism of the algorithm, thereby improving the throughput performance of the algorithm execution, thereby improving work efficiency.

[0066] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protectio...

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Abstract

The invention discloses a data information sorting method. The method comprises the steps that a CPU side executes a main program algorithm separated from a quick sorting algorithm, wherein the process that the CPU side executes the main program algorithm comprises the steps that a dataset to be sorted is transmitted to an FPGA side and sends a sorting starting control instruction to the FPGA side; after the FPGA side obtains the sorting starting control instruction, a kernel program algorithm separated from the quick sorting algorithm is executed, sorting processing is performed on the dataset to be sorted to obtain a corresponding sorting result. The FPGA side is added for executing a sorting algorithm kernel program, the existing hardware restriction is broken through, the operating rate is increased, and the working efficiency is improved. The invention further provides a data information sorting system, the CPU side and the FPGA side which can operate the data information sorting method. The operating rate can be increased, and the working efficiency can be improved.

Description

technical field [0001] The invention relates to the field of computers, in particular to a method for sorting data information, a CPU end, an FPGA (Field-Programmable Gate Array, Field-Programmable Gate Array) end and a system. Background technique [0002] With the development of information technology, the amount of data has also increased dramatically, and the speed of data processing has seriously affected the response time of user requests. Especially for applications under cloud computing, the rapid response of massive data processing requires a large amount of computing resources, which seriously affects the performance of cloud computing data processing centers. [0003] At present, the performance of the quick sorting method in the field of data search is relatively high, and many researches and technologies have improved the quick sorting algorithm to further improve the performance. However, the improvement of this technology is carried out in the existing CPU ha...

Claims

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Application Information

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IPC IPC(8): G06F9/38G06F15/78
CPCG06F15/781G06F9/3856
Inventor 李雪雷
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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