Mixed base DFT processing method, apparatus and device, and storage medium

Abstract

The embodiment of the invention discloses a mixed base DFT processing method, device and equipment and a storage medium. The method comprises the following steps: dividing a mixed base corresponding to a to-be-calculated original input sequence into a plurality of calculation levels, and determining a target calculation level needing sequence rearrangement according to the number of DFT points of the original input sequence; in the process of executing the DFT processing operation on the original input sequence by calculation hierarchy, if the original input sequence is executed to a target calculation hierarchy, reordering a plurality of hierarchy input sequences input to the target calculation hierarchy into a target sequence according to a set standard; and performing DFT processing corresponding to the target calculation hierarchy on the target sequence. According to the technical scheme of the embodiment of the invention, the calculation speed of the DFT is improved by fully utilizing the vector resources, and the mixed base DFT of any point number combination can be realized.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of digital signal processing and communication, and in particular, to a mixed-radix DFT processing method, device, device, and storage medium. Background technique [0002] In the prior art, when realizing the mixed base discrete Fourier transform (Discrete Fourier Transform, DFT), in order to make the calculation speed of the DFT reach the fastest, the hardware is basically implemented in the form of an application specific integrated circuit (ASIC). accomplish. This method needs to incorporate all the designed DFT points into the hardware, so that the ASIC chip has certain versatility, but this leads to higher costs. [0003] In addition, for the specific DFT points required by the proprietary network, if ASIC hardware is used to implement it, it needs to be redesigned and taped out, which not only increases the cost but also takes a long time. When using software to implement, if t...

AI Technical Summary

Problems solved by technology

This method needs to put all the DFT points of the design into the hardware, so that the ASIC chip has a certain degree of versatility, but this leads to higher costs

[0003] In addition, for the specific number of DFT points required by the proprietary network, if ASIC hardware implementation is used, it needs to be redesigned and taped out, which not only increases the cost but also takes a long time

When using software to implement, if the non-vector method is used, it will take a long time to complete a DFT calculation. Even if the software vector method is used to complete, if the vector resources cannot be fully utilized, it will still take more time.

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