Unlock instant, AI-driven research and patent intelligence for your innovation.

Time delay driving method of right angle Steiner tree under obstruction when making loose routing for standard units

A technology of overall wiring and standard units, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as inappropriateness, and achieve the effect of good line length performance

Inactive Publication Date: 2004-10-27
TSINGHUA UNIV
View PDF3 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Three documents: [Zhou Zhi, Minimum Steiner Tree Problem in Obstacle Manhattan Space (Master's Dissertation). Hefei: University of Science and Technology of China, 1998.], [Zhou Zhi, Chen Guoliang, Gu Jun. Using O(tlogt) connection Find the shortest path when there are obstacles. Journal of Computer Science, 1999, 22(5): 519-524.] and [Zhou Zhi, Jiang Chengdong, Huang Liusheng, Gu Jun, "Use the generalized connection graph of Θ(t) to find the shortest path when there are obstacles. The shortest path", Journal of Software, 2003, 14(2): pp.166-174.] proposed to use the generalized connection graph G G To construct the minimum Steiner tree of the two-end line network, and also propose G G can be used to construct multi-terminal nets, but they have not yet been implemented
Therefore, the method of this document is not suitable for the delay-driven right-angle Steiner tree construction method in overall wiring

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Time delay driving method of right angle Steiner tree under obstruction when making loose routing for standard units
  • Time delay driving method of right angle Steiner tree under obstruction when making loose routing for standard units
  • Time delay driving method of right angle Steiner tree under obstruction when making loose routing for standard units

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] Firstly, the core idea of ​​the "delay-driven Cartesian Steiner tree method considering obstacles" involved in this patent application is specifically analyzed.

[0043]The first step: by analyzing and deriving the known "Sakurai delay calculation formula", transforming and deforming the known "Dreyfus-Wagner iterative Steiner tree construction method", and then combining the two appropriately to obtain a new The delay formula of the minimum delay tree is iteratively solved by traversing the division of the vertex set.

[0044] (1) Brief introduction of "Sakurai Latency Calculation Formula"

[0045] The Sakurai delay calculation formula regards the interconnection line as a transmission line with distributed resistance and capacitance, and the calculation formula is basically the same as the actual situation. The delay calculation formula is:

[0046] T DZ =βR s (c e +C z )+αr e c e +βr e C z (1)

[0047] Among them: T DZ is the time delay valu...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Characters of the invention are: dividing set of vertex of each wire into sub sets; traversing set of vertex to obtain relation between two connected vertexes, carrying out time delay calculation by using time delay formula of solving minimum time delay tree; for obstructive route, looking up shortest distance between two obstructive points in advance by using improved Rubin method suitable to irregular grid, then carrying out time delay calculation; obtaining connected relation of vertexes of target Steiner tree accorded with minimum time delay; from bottom up, connection set of vertex step by step till final target Steiner tree. The invention considering both of minimized obstruction and time delay is capable of treating wire net with multiple end points or complex obstructive wire net.

Description

technical field [0001] The time-delay-driven Cartesian Steiner tree method under obstacles in the overall wiring of standard cells belongs to the technical field of computer-aided design of integrated circuits (IC CAD), and in particular relates to the field of overall wiring design of standard cells (SC). Background technique [0002] In integrated circuit (IC) design, physical design is the main link in the IC design process, and it is also the most time-consuming step. A computer-aided design technique related to physical design is called layout design. In layout design, overall wiring is an extremely important link, and its results have a great influence on the success of the final detailed wiring and the performance of the chip. [0003] The design scale of integrated circuits is currently developing from very large-scale (VLSI), very large-scale (ULSI) to G-scale (GSI), and the design concept of system-on-chip (SOC) has emerged. The research on the construction metho...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 洪先龙经彤许静宇杨旸
Owner TSINGHUA UNIV