Magnetic random access memory

a random access and memory technology, applied in the field of magnetic random access memory, can solve the problems of difficult to increase the memory capacity, difficult to accurately evaluate the resistance value of only the selected tmr element, and problem of read operation

Inactive Publication Date: 2005-02-17
IWATA YOSHIHISA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in this magnetic random access memory, it is difficult to increase the memory capacity.
However, in the cross-point cell array structure, since no select MOS transistor is present, a problem is posed in read operation.
In the cross-point cell array structure, however, since no select MOS transistor is connected to the TMR element, the read current flows through various paths via not only the selected TMR element but also other unselected TMR elements.
For this reason, it is difficult to accurately evaluate the resistance value of only the selected TMR element (or the voltage applied across the TMR element).
Consequently, it is difficult to accurately evaluate the resistance value of only the selected TMR element MTJ33 by a sense amplifier S / A.
Especially, at the start of read operation, the signal current does not flow to the operational amplifier OP1 at all, resulting in a delay in read operation.

Method used

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Examples

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application example

(3) APPLICATION EXAMPLE

[0399] An application example of the device structure of the magnetic random access memory according to the present invention will be described. As a characteristic feature of this application example, TMR elements are stacked at a plurality of stages to increase the memory capacity.

[0400] Assume that a cross-point memory cell array according to the present invention is arranged at one stage. When TMR elements are stacked at n (n is an integer; n≧2) stages, the cell size of a memory cell is 4F2 / n. F is the minimum size of design rule.

[0401]FIG. 26 shows an example of the device structure when TMR elements are stacked at two stages.

[0402] A word line WL1A running in the X-direction is arranged immediately under the TMR elements MTJ at the first stage. Bit lines BL1A, BL2A, and BL3A running in the Y-direction perpendicular to the X-direction are arranged immediately on the TMR elements MTJ at the first stage. The TMR elements MTJ are arranged at the intersect...

application example 1

(1) Application Example 1

[0439] {circle over (1)} Circuit Structure

[0440]FIG. 31 shows the main part of a magnetic random access memory according to Application Example 1 of the present invention.

[0441] As the first characteristic feature of the cell array structure of this example, one terminal of each of a plurality of TMR elements of a read block is commonly connected. As the second characteristic feature, the other terminal of each of a plurality of TMR elements of a read block is independently connected to a read bit line. As the third characteristic feature, one terminal of each of a plurality of TMR elements of a read block is directly connected to a read word line without intervening a read select switch.

[0442] A memory cell array 11 has a plurality of TMR elements 12 arranged in an array in the X- and Y-directions. For example, j TMR elements 12 are arranged in the X-direction, and 4×n TMR elements 12 are arranged in the Y-direction.

[0443] The four TMR elements 12 arran...

application example 2

(3) Application Example 2

[0570]FIG. 38 shows the circuit structure of a magnetic random access memory according to Application Example 2 of the present invention.

[0571] The circuit structure shown in FIG. 38 is an improved example of Detailed Example 1 (FIG. 34) of Application Example 1. As its characteristic feature, a precharge circuit which precharges all read word lines RWLi and all read bit lines RBLi to a precharge potential in advance in read operation is added to Detailed Example 1 of Application Example 1.

[0572] A memory cell array 11 has a plurality of TMR elements 12 arranged in an array in the X- and Y-directions. For example, j TMR elements 12 are arranged in the X-direction, and 4×n TMR elements 12 are arranged in the Y-direction.

[0573] The four TMR elements 12 arranged in the Y-direction form one read block BKik (i=1, . . . , j, k=1, . . . , n). The j read blocks BKik arranged in the X-direction form one row. The memory cell array 11 has n rows. In addition, n read...

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PUM

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Abstract

TMR elements are arranged at the intersections between word lines and bit lines. One end of each word line is connected to the ground point through a row select switch. One end of each bit line is connected to a bit line bias circuit. In read operation, the bit line bias circuit applies a bias potential to all the bit lines. The selected word line is short-circuited to the ground point. Unselected word lines are set in a floating state.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-401850, filed Dec. 28, 2001, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a magnetic random access memory (MRAM) which stores “1”- and “0”-data using a magnetoresistive effect. [0004] 2. Description of the Related Art [0005] In recent years, many memories which store data by new principles have been proposed. One of them is a magnetic random access memory which stores “1”- and “0”-data using a tunneling magnetoresistive (to be referred to as TMR hereinafter) effect. [0006] As a proposal for a magnetic random access memory, for example, Roy Scheuerlein et al, “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC2000 Technical Digest, p. ...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G11C11/15G11C11/16
CPCG11C11/16G11C11/15G11C11/1673G11C11/1655G11C11/1657G11C11/1675H10B61/22
InventorIWATA, YOSHIHISAHIGASHI, TOMOKI
OwnerIWATA YOSHIHISA