Semiconductor wafer inspection system and method

Active Publication Date: 2012-10-25
NANDA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0012]It has been found that an edge or outline of the object can be detected with a high accuracy based on an image recorded by the camera, if a retroreflecting surface or retroreflecting surface portion are positioned behind the edge or outline of the object. Compared to conventional arrangements, where surfaces reflecting light according to Lambert's law are positioned behind an object, the retroreflecting surface allows a determination of the edge or outline of the object from the recorded image with a higher accuracy.
[0027]The surface portion of retroreflective material on the movable grip portion may have an advantage in that a position of the wafer notch can be determined with a high accuracy also in situations in which the wafer notch happens to rest in a region of the movable grip portion.
[0031]With such relatively low numerical aperture, a determination of the position of the wafer within the field of view is possible with a relatively high accuracy, even if a distance between the wafer surface or edge and the retroreflective surface portion is relatively large.
[0037]With such method each of the plurality of wafers can be precisely and reproducibly positioned relative to the field of view, such that an image analysis including a wafer-to-wafer comparison can be used to detect defects and deficiencies in the individual wafers.

Problems solved by technology

The tools and methods for wafer edge and notch detection have sometimes been found to be insufficient and complicated.

Method used

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  • Semiconductor wafer inspection system and method
  • Semiconductor wafer inspection system and method
  • Semiconductor wafer inspection system and method

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Embodiment Construction

[0050]In the exemplary embodiments described below, components that are alike in function and structure are designated as far as possible by alike reference numerals. Therefore, to understand the features of the individual components of a specific embodiment, the descriptions of other embodiments and of the summary of the invention should be referred to.

[0051]FIG. 1 is a schematic illustration of a semiconductor wafer inspection system 1 which is configured to detect, position and inspect a semiconductor wafer 3. The semiconductor wafer has a wafer surface 5 provided on a substrate 7. The wafer surface may carry structures manufactured by lithographic processes, and the wafer surface 5 may be covered by layers such as resist layers or protective layers applied to the surface during manufacturing steps of the semi-conductor structures. The system 1 includes optics providing an imaging beam path, a bright-field illumination beam path and a dark-field illumination beam path. The illust...

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Abstract

A wafer inspection system comprises a camera having a field of view, an object mount configured to position at least a portion of surface 5 of an object 3 at an object plane 15 relative to the camera and within the field of view of the camera and at least one surface portion 41 carrying a multitude of retroreflectors 95 disposed at a greater Δd distance from the camera than the object plane and within the field of view of the camera.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to semiconductor wafer inspection systems and semiconductor wafer inspection methods.[0003]2. Brief Description of Related Art[0004]Semiconductor circuits are manufactured by forming micro-patterned structures on a flat semiconductor wafer substrate using lithographic methods. A wafer substrate may have a diameter of about 300 mm, wherein several hundred circuits are arranged in individual dies typically having diameters in the order of some millimetres to some 10 mm, wherein the structures of the semiconductor circuits may have dimensions below 0.1 μm. It is desirable to detect defects in the manufactured patterns and deficiencies of a manufacturing process at early stages of the semiconductor manufacture.[0005]Several techniques are known for inspection of semiconductor substrates. These techniques try to locate defects on a wafer substrate in a coordinate system defined relative to the w...

Claims

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Application Information

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IPC IPC(8): H04N7/18
CPCG01N21/9501G01N21/9503H01L2223/54493H01L23/544H01L21/681H01L2924/0002H01L2924/00
InventorMARKWORT, LARSHEGELS, ERNST
OwnerNANDA TECH