Chip verification system and verification method therefor

a verification system and chip technology, applied in the field of verification technology, can solve the problems of increasing failing to verify a chip in mixed scenarios, and unable to realize the verification of the chip, so as to reduce workload and the design duration of the verification system, and enhance the portability and verification coverage of the verification system

Active Publication Date: 2022-11-10
REALTEK SEMICON CORP
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  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present patent aims to reduce workload and design duration of verification systems by using multiple access modules and a return module to functionally verify registers in different ways. This improves portability and verification coverage of the verification system.

Problems solved by technology

However, such a method not only increases workloads and a design duration of a verification system, but also fails to verify a chip in mixed scenarios and in a scenario in which different access manners are used together.
Therefore, the forgoing single verification system for verification of a single access manner cannot realize the verification of the chip.

Method used

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  • Chip verification system and verification method therefor
  • Chip verification system and verification method therefor
  • Chip verification system and verification method therefor

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Embodiment Construction

[0014]Refer to FIG. 1 to FIG. 3. FIG. 1 is a schematic block diagram of an electronic device 10 according to some embodiments of the present disclosure. FIG. 2 is a schematic block diagram of a chip verification system 20 according to some embodiments of the present disclosure. FIG. 3 is a schematic flowchart of a verification method for the chip verification system 20 according to some embodiments of the present disclosure. The verification method may be performed by the chip verification system 20, so as to simulate operation of a chip and verify whether a function of a storage element of the chip is correct. The electronic device 10 may be an exemplary environment for the chip verification system 20. For example, the chip verification system 20 may be implemented by a computer program product (specifically, the chip verification system 20 is a verification platform established based on universal verification methodology, and the verification platform may have a top layer (top), a...

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Abstract

A chip verification system includes a plurality of agent modules, a register model, and a scoreboard module. The register model includes a register database, a plurality of access modules, and a return module. Each access module corresponds to one of a plurality of attribute parameters. Each agent module transmits an address code of its sequence to the return module. The return module obtains, according to the received address code, an address subject and the attribute parameter corresponding to the received address code from the register database, and outputs the obtained attribute parameter. Each driver module calls, according to the received attribute parameter, the corresponding access module to perform an operation on registers of DUT circuit according to a read write command of the sequence. The scoreboard module records each performed operation to generate an operation record, and outputs a verification result according to the operation record and data in registers.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This non-provisional application claims priority under 35 U.S.C. § 119(a) to Patent Application No. 202110500747.3 filed in China, P.R.C. on May 8, 2021, the entire contents of which are hereby incorporated by reference.BACKGROUNDTechnical Field[0002]The present invention relates to a verification technology, and in particular, to a chip verification system capable of verifying registers to be accessed in different manners and a verification method therefor.Related Art[0003]Generally, after designing of a chip (or an integrated circuit) and before mass production, a function of the designed chip needs to be verified to detect whether the chip can normally operate (for example, whether a register of the chip can be correctly accessed). Since an existing chip usually has some design specifications and may be externally connected to various devices, and different devices may support different access manner (for example, support different comm...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G06F30/3308
CPCG06F30/3308G11C29/08G11C29/12G11C29/18G11C2029/4402G06F30/333G06F30/367G06F30/398G01R31/31704G06F11/00G01R31/28
InventorSHEN, XIANG-HUAQIU, DONGZHENG, DE-PINLIU, MENG
OwnerREALTEK SEMICON CORP