Cache access memory and method

A memory and cache technology, applied in the field of cache memory, can solve problems such as loss of content

Inactive Publication Date: 2012-08-29
IBM CORP
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  • Summary
  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

Random access memory is volatile memory, meani...

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  • Cache access memory and method
  • Cache access memory and method
  • Cache access memory and method

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Embodiment Construction

[0018] The illustrative embodiments provide a mechanism for gating read access to any line in a cache access memory (eg, static random access memory (SRAM) based cache memory) that has been invalidated. When a read access to an invalid row is requested, the word line driver for that row will not be active. The bit line will stay at the precharge voltage and will consume very little bit line power. The actual value stored in the valid bit position still needs to be propagated to the output of the array, because the downstream logic needs the valid bit data to ignore the data returned from the array access of the invalid row.

[0019] figure 1 Provided is one example of a data processing environment in which a cache memory array may be utilized (ie, in a cache memory of a processor). figure 1 The presentation is provided merely as an example data processing environment in which aspects of the illustrative embodiments may be implemented, and is not intended to state or imply an...

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Abstract

A mechanism is provided for gating a read access of any row in a cache access memory that has been invalidated. An address decoder in the cache access memory sends a memory access to a non-gated wordline driver and a gated wordline driver associated with the memory access. The non-gated wordline driver outputs the data stored in a valid bit memory cell to the gated wordline driver in response to the non-gated wordline driver determining the memory access as a read access. The gated wordline driver determines whether the data from the valid bit memory cell from the non-gated wordline driver indicates either valid data or invalid data in response to the gated wordline driver determining the memory access as a read access and denies an output of the data in a row of memory cells associated with the gated wordline driver in response to the data being invalid.

Description

technical field [0001] The present application relates generally to cache memories, methods and design structures for gating read access to rows of such memories. Background technique [0002] Random Access Memory (RAM) most commonly refers to computer chips that temporarily store dynamic data to increase computer performance. By storing frequently used or active files in random access memory, a computer can access data faster than if the computer retrieved the data from a much larger hard drive. Random access memory is volatile memory, meaning it loses its contents once the power is turned off. This is different for non-volatile memory such as hard disks and flash memory, which do not require power to retain data. Data located in random access memory is committed to permanent storage on the hard drive or flash drive when the computer is normally shut down. On the next boot, RAM begins to fill with programs that load automatically at startup, as well as files opened by th...

Claims

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Application Information

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IPC IPC(8): G06F12/08G11C7/10G11C7/24G11C8/10G11C8/20G11C15/04
CPCG06F12/0895G06F2212/1028G11C11/412Y02D10/00
Inventor 张家宝M.J.H.李S.沃德
Owner IBM CORP
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