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Synchronized method of orthogonal frequency division multiplexing system

An orthogonal frequency division and bit synchronization technology, applied in the field of communication, can solve the problems of waste of preamble resources and computing resources, non-existence of reliable threshold values, and difficulty in finding reliable threshold values, so as to improve synchronization performance and improve effective performance, the effect of reducing power consumption

Active Publication Date: 2013-07-03
NO 50 RES INST OF CHINA ELECTRONICS TECH GRP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It is difficult to find a reliable threshold value suitable for various channel characteristics, and even this absolute reliable threshold value does not exist
[0028] 3. Once entering the "Symbol Synchronization" process, the calculation result of "Group Detection" will no longer contribute any information to the synchronization process
This means a waste of leading resources and computing resources

Method used

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  • Synchronized method of orthogonal frequency division multiplexing system
  • Synchronized method of orthogonal frequency division multiplexing system
  • Synchronized method of orthogonal frequency division multiplexing system

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Embodiment Construction

[0054] The following embodiments of the present invention effectively improve the synchronization performance of the OFDM system by closely combining "packet detection" and "symbol synchronization" and using relative threshold criteria instead of original absolute threshold criteria.

[0055] In summary, the embodiments of the present invention use the results of short preamble "packet detection" and "symbol synchronization" to perform step-by-step joint criteria without increasing the amount of computation, and design corresponding relative criterion thresholds. The specific process is as follows:

[0056] sender

[0057] This embodiment can use the same preamble structure as 802.11a. Such as figure 2 As shown, 10 identical short preamble sequences are inserted into each frame header. The sequence adopts CAZAC (Constant Envelope Zero Autocorrelation Sequence) sequence. The length is 2 data symbols length including cyclic prefix.

[0058] Receiving end

[0059] The sync...

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Abstract

The invention relates to a synchronized method of an orthogonal frequency division multiplexing system. An idle condition, a peak searching condition, a bit synchronization confirming condition, a frame synchronization judgment condition and a synchronization completing condition are set by the method. When all conditions except the idle condition do not meet a specific judgment, all the conditions can return the idle condition, so that after the system enters a false-alarm synchronizing process, the system can rapidly quit from returning. Equally, the synchronized method improves synchronization probability of the system and reduces power dissipation.

Description

technical field [0001] The invention belongs to the technical field of communication, in particular to a synchronization method in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. Background technique [0002] Orthogonal Frequency Division Multiplexing (OFDM) technology is considered to be one of the core technologies of the fourth generation of mobile communication 4G because of its efficient spectrum utilization and good anti-multipath fading performance. At present, OFDM technology has been widely used in asymmetric digital subscriber line (ADSL), digital audio broadcasting (DAB) and digital television broadcasting (DVB), IEEE 802.11, IEEE 802.16 and power line broadband data communication. [0003] The basic principle of OFDM is to distribute high-speed data streams to several sub-channels with relatively low transmission rates for transmission through serial-to-parallel conversion. Since the symbol period in each subchannel increases relativel...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L27/26
Inventor 史可显
Owner NO 50 RES INST OF CHINA ELECTRONICS TECH GRP
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