Rotate left-based quasi-cyclic low density parity check (LDPC) serial encoder in near field communication

Abstract

The invention provides a rotate left-based quasi-cyclic low density parity check (LDPC) serial encoder in near field communication. The encoder comprises 2 generating polynomial lookup tables which prestore cyclic matrix generating polynomials of the generating matrixes, 2 511-bit binary multipliers which perform scalar multiplication on information bit and the generating polynomials, 2 511-bit binary adders which perform modulo 2 addition on products and contents of shift registers, and 2 511-bit shift registers which store the sums which are rotated left for one bit. Finally, calibration data are contained in the 2 shift registers. The serial encoder provided by the invention is applicable to a near field communication system of consultative committee for space data systems (CCSDS), and has the advantages of few registers, simple structure, low power consumption, low cost and the like.

Description

technical field [0001] The invention relates to the field of channel coding, in particular to a serial coder of a quasi-cyclic LDPC code in a CCSDS near-earth communication system. Background technique [0002] Low-Density Parity-Check (LDPC) code is one of the efficient channel coding techniques, and quasi-cyclic LDPC (Quasic-LDPC, QC-LDPC) code is a special LDPC code. Both the generation matrix G and the check matrix H of the QC-LDPC code are arrays composed of cyclic matrices, which have the characteristics of segmental circulation, so they are called quasi-cyclic LDPC codes. The first row of the circulant matrix is ​​the result of the cyclic right shift of the last row by 1 bit, and the remaining rows are the result of the cyclic right shift of the previous row by 1 bit. Therefore, the circulant matrix is ​​completely characterized by its first row. Usually, the first row of a circulant matrix is ​​called its generator polynomial. [0003] The CCSDS near-earth communic...

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Problems solved by technology

One of the disadvantages of this scheme is that a large number of registers are required, which will inevitably lead to large power consumption and high cost of the circuit.

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