Method for searching mapping scheme between tasks and nodes of network-on-chip (NoC) and network code position

A technology of on-chip network and mapping scheme, which is applied in the direction of energy-saving ICT, advanced technology, electrical components, etc., and can solve problems such as lack of performance and lack of consideration of related performance
CN103428804AActive Publication Date: 2013-12-04UNIV OF ELECTRONIC SCI & TECH OF CHINA

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
UNIV OF ELECTRONIC SCI & TECH OF CHINA
Publication Date
2013-12-04

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses a method for searching a mapping scheme between tasks and nodes of an NoC and a network code position. According to mapping of multicast applications on the wireless NoC, during searching of an optimal node distribution and route selection scheme, total power consumption and response time of the unicast task serve as priority indexes for checking the scheme, and meanwhile, the maximum throughput rate of the multicast task and the lowest network transmission power consumption of the multicast task are guaranteed. Thus, the performance of the network designed as per the scheme selected according to the method is optimal, and compared with other methods for searching priority schemes of mapping between the tasks and the nodes under the conditions of multiple objective functions, the method has the advantages of being low in complexity and easy to implement.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention belongs to the field of integrated circuit design, and is particularly aimed at the task distribution of wireless on-chip networks and the search process of network coding paths and code point positions, and specifically relates to a mapping scheme for finding tasks and nodes of wireless on-chip networks and network coding positions. method. Background technique

[0002] In the information market, as the scale of microchip technology continues to expand, large-scale systems on chips become possible. As a new communication architecture for designing multi-core chips, Network-on-Chip can well deal with the complex global communication problems between chips in SoC design. However, due to the two-dimensional metal connection of the network on chip, there are problems of high delay and high energy consumption when the network on chip performs multi-hop transmission. When the scale of the processor is expanded, the reliability of the network ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More