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High performance network tester and the testing method thereof

A network tester and the technology of the realization method, which are applied in the direction of data exchange network, digital transmission system, electrical components, etc., can solve the problems of poor real-time performance, low speed, unable to meet the performance test requirements, etc., and achieve long service life and easy compatibility. Effect

Active Publication Date: 2015-11-25
NANJING UNIV OF SCI & TECH +1
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AI Technical Summary

Problems solved by technology

Simply using software to implement network performance testing has a low rate and poor real-time performance, which cannot meet the performance testing requirements of current high-speed networks

Method used

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  • High performance network tester and the testing method thereof
  • High performance network tester and the testing method thereof
  • High performance network tester and the testing method thereof

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Embodiment Construction

[0044] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

[0045] The present invention is based on the network tester of FPGA, this tester is made up of RJ45 interface, optical interface SFP, physical interface PHY, FPGA, PowerPC, ARM, display control device, structure such as figure 1 shown. The whole test system consists of three parts: PC, network tester, and test port. The network tester completes the basic functions of the test, including the generation, transmission and reception of test traffic, the measurement of test statistics, the analysis of network protocols, etc. The PC completes the control of the tester through software and is responsible for the interaction with users, including Attributes of test traffic, analysis and display of test results, etc. The test ports supported by this tester include 3-way 10...

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Abstract

The invention discloses a high performance network tester and a testing method of the high performance network tester with the adoption of a FPGA+PowerPC+ARM framework. The network tester comprises a RJ45 interface, a transformer, a physical interface (PHY), an optical interface SFP, an FPGA, a PowerPC, an ARM and a display control device. The FPGA completes the generation and reception of testing flows, conducts analysis of a first layer message and a second layer message, controls the FPGA and surveys the first layer message and the second layer message; the PowerPC conducts analysis of a network protocol on a third layer or layers above; the ARM communicates with a computer to realize the display and control of entire equipment. According to the invention, the network tester puts together the advantages of three processors. The network tester is provided with high flexibility and is cost-effective to make. The tester is also compatible with a variety of interfaces and has strong expansibility.

Description

technical field [0001] The invention relates to the technical field of high-speed network performance testing, in particular to a network tester based on FPGA+PowerPC+ARM. Background technique [0002] In the case of a large number of network infrastructure construction, there is a huge demand for network testing. No matter in the research and development of network communication equipment, or in application occasions such as network construction, daily maintenance and troubleshooting, the majority of engineering and technical personnel cannot do without the support and help of various network testing instruments. In the data communication network, the network performance test system can be used to detect the specific performance indicators of network equipment, such as throughput, delay, packet loss rate, back-to-back, etc., and is an important method to accurately evaluate the performance of network equipment under different network loads. means. [0003] At present, the...

Claims

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Application Information

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IPC IPC(8): H04L12/26
CPCH04L43/08H04L43/18H04L43/50
Inventor 李洪涛王放丁增霞潘龙
Owner NANJING UNIV OF SCI & TECH
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