Broadband digital channelization parallel processing method based on serial FFT IP core

Abstract

The present invention discloses a broadband digital channelization parallel processing method based on a serial FFT IP core, and gives a method for designing a parallel FFT IP core based on the serial FFT core. According to the method disclosed by the present invention, after broadband signals intercepted by an electronic signal reconnaissance receiver are sampled by using a high-speed AD, data is grouped; parallel-serial conversion pipeline processing of the data is performed in groups; the parallel data is transformed into the serial data; and meanwhile, pipeline conversion processing can be guaranteed to be uninterruptedly carried out on the input parallel in a time sequence so as to achieve an effect of parallel data input and parallel data output. Moreover, due to a determined sequential relationship of the input data and output data, continuous input and continuous output of data flow are guaranteed. In a process of FPGA program verification, parameters, such as a bit width processed in each stage, a coefficient of a channel filter, a bit width of the channel filter, a bit width of an FFT twiddle factor and the like, are continuously modified, and under a situation of meeting design indexes, a resource occupation rate is reduced to the greatest extent.

Description

technical field [0001] The invention is applied in the technical field of digital signal processing, and in particular relates to a method for designing parallel FFTIP cores based on FPGA serial FFTIP cores. Background technique [0002] At present, in the field of electronic reconnaissance, in order to improve the interception probability of various broadband signals, it is necessary for the electronic reconnaissance system to have a large instantaneous signal coverage bandwidth. Larger instantaneous signal bandwidth can be obtained by using wideband channelized receivers, but it is technically complicated to implement. Traditional channelized receivers use analog circuits to achieve multi-channel filtering. Due to the limitation of the performance of analog devices, this kind of receiver has a large volume and poor consistency between channels, and the circuit of each channel requires designers to continuously Only repeated debugging can meet the performance requirements,...

Images