Circuit and method of bring clken signals forward

Abstract

The invention provides a circuit and a method of bring clken signals forward. The circuit comprises a synchronization unit, a circulating accumulator, a Clken frequency division threshold determining unit, a standard frequency division threshold determining unit, an OR gate, an inverter, an AND gate, and an ICG gating unit. The synchronization unit is connected with a source clock, a frequency division coefficient, the Clken frequency division threshold determining unit, and the standard frequency division threshold determining unit. The circulating accumulator is respectively connected with the source clock, the Clken frequency division threshold determining unit, a standard frequency division threshold determining unit. The Clken frequency division threshold determining unit is used to output clken signals of a row ahead. The OR gate is used to respectively receive power supply domain switch state signals and clock switch control signals, is connected with the Enable end of the ICG gating unit by the inverter and the AND gate, and is used to enable the ICG gating unit to generate clk_out signals. The clken becomes effective ahead of a low frequency clock domain, and then ever module can run in highest efficiency.

Description

technical field [0001] The invention relates to a chip technology, in particular to a circuit and method for advancing clock effective signals. Background technique [0002] With more and more circuit functions in chip design, each module has different frequency requirements. For example, module A can work at a maximum of 200MHz, and module B can work at a maximum of 100MHz. In traditional solutions, Only one clock is used, and all circuits run at the lowest clock frequency among all modules, which simplifies the design difficulty. However, in the current technology, in order to allow all modules to work at their highest frequency to improve the overall performance of the system, more and more chips have a large number of circuit modules that work in the same phase but under different frequency clocks, but this brings A new problem is how to carry out the circuit signal interaction between different frequencies. The current technology usually solves the signal interaction t...

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Problems solved by technology

[0004] However, the current Clken data interaction technology also has a shortcoming, that is, after the clock generation circuit generates the clken register to output the clken signal, the signal will be connected to the input of many registers in the high-frequency clock domain, because the clock generation circuit is often in the chip layout with other circuits The medium distance is long, and it is easy to cause the timing path of the clken signal to be too long due to the long wiring, which easily affects the highest frequency of the high-frequency clock domain circuit.

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