Novel I/O circuit design for hardware acceleration in https application

A new type of hardware acceleration technology, applied in data exchange through path configuration, electrical components, digital transmission systems, etc., can solve problems such as limiting hardware performance

Inactive Publication Date: 2017-12-01
CHONGQING UNIV
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  • Claims
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Problems solved by technology

In the current process, the CPU must call the security processor in a sync

Method used

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  • Novel I/O circuit design for hardware acceleration in https application
  • Novel I/O circuit design for hardware acceleration in https application
  • Novel I/O circuit design for hardware acceleration in https application

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Embodiment Construction

[0044] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further explained below in conjunction with the accompanying drawings, and this embodiment does not constitute a limitation to the embodiment of the present invention.

[0045] The embodiment of the present invention is described by taking the Nginx server application as an example.

[0046] In the process of transmitting data through the HTTPS protocol, Nginx first negotiates with the client during the handshake process on the algorithm used for encryption and the corresponding key, initial vector and other information. After adopting the new I / O process designed in this paper, in the handshake process, it is necessary to set the corresponding algorithm, key, initial vector and other information through the newly provided data transmission control interface according to the protocol result.

[0047] The data sending process when responding to ht...

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Abstract

The invention discloses a novel I/O circuit design for hardware acceleration in https application, which mainly targets at the design of an I/O circuit in a data transmission process in secure communication. The design mainly comprises novel data transmission and the design of a related hardware configuration interface; the design of novel hardware with data encryption and sending functions, and the design of a data structure necessary for the novel hardware. The upper layer application directly submits original data to the novel hardware through a novel data sending interface. The hardware performs a data encryption and sending operation according to task demands. This design simplifies the service logic of the upper layer application in a secure data transmission process, meanwhile reduces the participation of a CPU in the data encryption and sending process and reduces the system load so as to improve the overall performance of the system.

Description

technical field [0001] The present invention relates to hardware acceleration-related design in a secure communication process, in particular to a method for designing a new type of I / O path for hardware acceleration in an HTTPS application. Background technique [0002] SSL is the English abbreviation of Secure Socket Layer, which means Secure Socket Layer Protocol in Chinese, which refers to a secure network communication protocol that uses a combination of public key and private key technology. The SSL protocol is a security protocol based on WEB applications launched by Netscape. The SSL protocol specifies a mechanism that provides data security layers between the application protocol and the TCP / IP protocol. It provides data encryption for TCP / IP connections, Server authentication, message integrity, and optional client authentication are mainly used to improve the security of the direct data of the application, encrypt and hide the transmitted data, and ensure that the...

Claims

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Application Information

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IPC IPC(8): H04L29/06H04L12/46
CPCH04L12/4633H04L63/0428H04L63/062H04L63/12H04L63/168
Inventor 肖春华谢玉华张蕾李林芝
Owner CHONGQING UNIV
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