A kind of realization method of ADC controller with multi-sampling rate

A technology with multiple sampling rates and implementation methods, applied in analog-to-digital converters, analog-to-digital conversion, code conversion, etc., can solve problems such as extra processing delay of data acquisition system, attenuation of high-frequency components of acquisition signals, and large calculation overhead , to achieve the effect of less ADC startup times, short sampling delay, simple and easy to implement

Active Publication Date: 2022-02-18
NANJING PANENG TECHNOLOGY DEVELOPMENT CO LTD
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Problems solved by technology

[0005] The above two methods have achieved multi-rate sampling to a certain extent, and there are different defects, as follows: method (1) requires ADC high-speed sampling and requires a large amount of buffer, and because the ADC works in high-speed mode, the system power consumption will also be proportional increase; method (2) uses the interpolation method to realize the sampling rate conversion, but it will bring additional processing delay and a large amount of calculation overhead to the data acquisition system. In addition, the low-order interpolation algorithm will also cause high-frequency The component is attenuated, the output accuracy is reduced, and the noise is inevitably introduced by the algorithm

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  • A kind of realization method of ADC controller with multi-sampling rate
  • A kind of realization method of ADC controller with multi-sampling rate
  • A kind of realization method of ADC controller with multi-sampling rate

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Embodiment Construction

[0037] The present invention will be further described below in conjunction with the accompanying drawings.

[0038] The ADC controller with multiple sampling rates of the present invention specifically includes a trigger timer, a sampling trigger combiner, a sampling value issuer, a plurality of independent sampling controllers and a data interface module, and its realization includes the following steps:

[0039] Step (1), construct the hardware structure of the ADC controller of multiple sampling rates, the hardware structure of this ADC controller, as figure 1 As shown, it includes a trigger timer and a plurality of independent sampling controllers, a sampling trigger merger and a sampling value issuer. Generate a basic timing signal, and drive the sampling controller to generate an independent sampling trigger signal;

[0040] Step (2), connecting the counting input terminals of each sampling controller to the trigger timer, each independent sampling controller independent...

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Abstract

The invention discloses a multi-sampling-rate ADC controller realization method. Each sampling controller is controlled by a trigger timer to independently generate a sampling trigger pulse, and then a sampling trigger combiner combines multiple sampling trigger signals into a sampling trigger with variable intervals. The signal starts the ADC module, and finally the sampling value publisher synchronously writes the ADC conversion result into the sampling value buffer queue of the corresponding sampling controller according to the sampling trigger request of each independent sampling controller to complete multi-rate data sampling. The present invention is simple and easy to implement, The sampling buffer is small, the number of ADC startups is small, and the sampling delay is short, etc., and has a good application prospect.

Description

technical field [0001] The invention relates to the technical field of data acquisition, in particular to a method for realizing an ADC controller with multiple sampling rates. Background technique [0002] With the rapid development of microprocessor technology, in the current embedded device applications, there are requirements for multiple microprocessors to cooperate to complete system functions. Due to the size, cost, power consumption and other factors of embedded devices, more expectations The data collected by the front end can realize multi-service sharing. However, since the focus of each application program is different, the sampling rate requirements are also different, so the sampling rate conversion has become a problem that many real-time embedded device applications have to face. In the prior art, the sampling rate conversion of analog data , there are mainly the following two methods, as follows: [0003] (1) High-speed sampling is performed according to t...

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H03M1/12H03M1/18
CPCH03M1/126H03M1/188
Inventor庞吉耀
OwnerNANJING PANENG TECHNOLOGY DEVELOPMENT CO LTD