Hardware realization system and method of video display stream compression coding
A compression coding and video display technology, applied in the fields of digital video signal modification, electrical components, image communication, etc., can solve the problem of low compression rate of DSC algorithm, and achieve the benefits of system running speed, processing speed, and critical path delay. Effect
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[0047] Embodiments of the present invention will be described below in conjunction with the accompanying drawings.
[0048] Such as figure 1 As shown, the present invention designs a hardware implementation system of video display stream compression encoding, and the hardware implementation system of the DSC encoding mainly includes: a color space conversion module 101, a data read-in pixel buffer module 102, a control module 103, and a prediction module 104 , quantization module 105, difference reconstruction module 106, color history index module 107, flatness detection module 108, code rate control module 109, entropy coding module 110, line buffer module 111, code stream multiplexing module 112, rate buffer FIFO113.
[0049] Wherein, the color space conversion module 101 is used to receive RGB video source pixels that need to be compressed from the outside, and convert the input video source pixels to be compressed and encoded in RGB format into pixel data in YCoCg format ...
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