Memory access method and device of processor

Abstract

The embodiment of the invention provides a memory access method and device for a processor, and the method comprises the steps of obtaining a kernel identification in a business flow when the businessflow in the processor applies for a memory, and determining the node information of the business flow according to the kernel identification; and applying for a memory from a memory pool corresponding to the node information so as to perform memory access. Memory access can be carried out according to nodes, cross-node access is greatly reduced, synchronization between a local memory and a far-end memory is avoided, and memory access time delay is reduced. In this way, through modification of a software scheme, the system performance can be linearly increased along with increase of the numberof processors, and therefore the processing speed of domestic processors is effectively increased.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a processor memory access method and device. Background technique [0002] The memory access scheme of many processors usually means that each core can access the memory banks in all nodes, such as the Shenwei 1621 processor, but this access time varies with the distance of the nodes. The performance of the core accessing the memory group of this node is better than that of accessing other nodes, so the memory group in this node is called local memory, and the memory group of other nodes is called remote memory. [0003] In the prior art, the core of the Shenwei 1621 processor does not distinguish between nodes when accessing the memory. When a certain core accesses the local memory area, the speed is fast, but when crossing nodes, the memory cache will be destroyed, and two memory areas are needed. Mutual synchronization and frequent data migration will always cause cache mis...

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Problems solved by technology

[0003] In the prior art, the core of the Shenwei 1621 processor does not distinguish between nodes when accessing the memory. When a certain core accesses the local memory area, the speed is fast, but when crossing nodes, the memory cache will be destroyed, and two memory areas are needed. Mutual synchronization and frequent data migration will always cause cache misses, which not only increases access overhead, but also seriously affects system performance

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