Method of communicating between modules in a decoding system

a decoding system and communication method technology, applied in the field of communication between modules in the decoding system, can solve the problems of processing difficulty, cost, and difficulty in programing, and achieve the effect of increasing the efficiency and performance of the decoding system
US20060056517A1Inactive Publication Date: 2006-03-16AVAGO TECH WIRELESS IP SINGAPORE PTE
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Patent Information

Authority / Receiving Office
US ¡ United States
Patent Type
Applications(United States)
Current Assignee / Owner
AVAGO TECH WIRELESS IP SINGAPORE PTE
Publication Date
2006-03-16
Estimated Expiration
Not applicable ¡ inactive patent

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Abstract

Means of communicating between modules in a decoding system. A variable-length decoding accelerator communicates with a core decoder processor via a co-processor interface. In one embodiment, other decoding accelerators, in addition to the variable-length decoder, are adapted to provide status data indicative of their status to a co-processor status register. In another embodiment, a decoding accelerator is controlled by providing commands to the accelerator via posted write operations and polling the accelerator to determine whether the command has been performed. In still another embodiment, a first hardware accelerator communicates with a core decoder processor via a co-processor interface and other decoding accelerators, in addition to the first hardware accelerator, are adapted to provide status data indicative of their status to a co-processor status register.
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Description

INCORPORATION BY REFERENCE OF RELATED APPLICATIONS

[0001] The following U.S. Patent Applications are related to the present application and are hereby specifically incorporated by reference: patent application Ser. No. ______, entitled “METHOD OF OPERATING A VIDEO DECODING SYSTEM” (Attorney Ref. No. 13305US01); patent application Ser. No. ______, entitled “VIDEO DECODING SYSTEM SUPPORTING MULTIPLE STANDARDS” (Attorney Ref. No. 13301US01); patent application Ser. No. ______, entitled “MEMORY SYSTEM FOR VIDEO DECODING SYSTEM” (Attorney Ref. No. 13388US01); patent application Ser. No. ______, entitled “INVERSE DISCRETE COSINE TRANSFORM SUPPORTING MULTIPLE DECODING PROCESSES” (Attorney Ref. No. 13303US01); and patent application Ser. No. ______, entitled “RISC PROCESSOR SUPPORTING ONE OR MORE UNINTERRUPTIBLE CO-PROCESSORS” (Attorney Ref. No. 13306US01); all filed on even date herewith. The following Provisional U.S. Patent Applications are also related to the present application and are...

Claims

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