Driver circuit
a technology of drivers and circuits, applied in the direction of pulse manipulation, power consumption reduction, pulse technique, etc., can solve the problems of difficult to finely control load, shoot through current, and significant danger of shooting through current, and achieve the effect of preferred linearity as input-output characteristi
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embodiment 1
[0029] FIGS. 1 to 6 show (Embodiment 1) of the present invention.
[0030] Constituent elements act as those of FIGS. 11 and 12 showing the conventional art are indicated by the same reference numerals.
[0031]FIG. 1 shows a driver circuit of (Embodiment 1). FIG. 2 shows the detail of an output driver circuit on side A of FIG. 1. In FIG. 11 showing the conventional art, only the input pulse INA is supplied as an input signal to the timing pulse generator 1 on side A and only the input pulse INB is supplied as an input signal to the timing pulse generator 5 on side B; whereas in FIG. 1 showing (Embodiment 1), input pulses INA and INB are supplied to both of a timing pulse generator 1 on side A and a timing pulse generator 5 on side B. As shown in FIG. 2, instead of the pulses AF and AD shown in FIGS. 12 and 13, pulses AH and AI (described later) are applied to the gates of N-type switch transistors 33 and 36.
[0032] The detail will be discussed below.
[0033] The driver circuit drives a ...
embodiment 2
[0051]FIG. 7 is a circuit diagram showing a driver of (Embodiment 2).
[0052] The detector circuits A1 and B1 of (Embodiment 1) detect whether the input pulses INB and INA on the opposite side are set at “H” or “L”, and then, the output pulses of the timing pulse generators 1 and 5 are controlled. In (Embodiment 2), a state of a channel driver on the opposite side is decided based on the output level of its own channel driver, and then, the output pulses of timing pulse generators 1 and 5 are controlled.
[0053] In FIG. 7, a detector circuit A1 for controlling a generation pulse for the timing pulse generator 1 of a first channel driver D1 is constituted of comparators 81 and 82. The comparator 81 detects a current passing through an upper output transistor 41 and outputs the current to an upper current detecting terminal T1, and the comparator 82 detects a current passing through a lower output transistor 42 and outputs the current to a lower current detecting terminal T2.
[0054] Whe...
embodiment 3
[0057]FIG. 8 is a circuit diagram showing a driver of (Embodiment 3).
[0058] The detector circuits A1 and A2 of (Embodiment 1) detect whether the input pulses INB and INA on the opposite side are set at “H” or “L” and the output pulses of the timing pulse generators 1 and 5 are controlled. In (Embodiment 3), a state of a channel driver on the opposite side is decided based on a state of a voltage between the gate and source of an upper output transistor 41 and a state of a voltage between the gate and source of a lower output transistor 42 on the opposite side, and the output pulses of timing pulse generators 1 and 5 are controlled.
[0059] In FIG. 8, a detector circuit B1 for controlling a generation pulse for the timing pulse generator 5 of a second channel driver D2 is constituted of transistors 61, 62, 63, 64 and so on.
[0060] The transistor 61 constitutes a mirror circuit with the upper output transistor 41, detects the voltage between the gate and source of the upper output tra...
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