Wiring method, structure having wiring provided on surface, semiconductor device, wiring board, memory card, electric device, module, and multilayer circuit board
a wiring and surface technology, applied in the field of wiring methods, can solve the problems of obstructing the achievement of higher density of wiring circuits, greater possibility of shorting or migration between adjacent wiring, etc., and achieve the effect of avoiding obstructing the achievement of higher density
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first embodiment
[0041]A wiring method relating to a first embodiment of the present invention is now described with reference to FIGS. 1A to 1F and FIGS. 2D to 2E. In FIGS. 1A to 1F and FIGS. 2D to 2E, reference numeral 1 is a structure on which a plurality of parts to be connected are exposed, reference numeral 10 is a semiconductor device, reference numeral 100 is a semiconductor device sealed with a sealing resin, reference numeral 101 is an insulating base material, reference numeral 101a is a connecting terminal of an insulating base material (part to be connected), reference numeral 102 is a semiconductor chip, reference numeral 102a is a connecting terminal of a semiconductor chip (part to be connected), reference numeral 103 is an insulating layer, reference numeral 104 is a resin film, reference numeral 105 is a groove, reference numerals 106, 107 are communicating holes, reference numeral 108 is wiring, reference numeral 108a is a wiring main body section, reference numeral 108b is a wiri...
second embodiment
[0129]A wiring method relating to a second embodiment of the present invention is now described with reference to FIGS. 3A to 3F. In FIGS. 3A to 3F, reference numeral 2 is a structure on which a plurality of parts to be connected are exposed, reference numeral 20 is a semiconductor device, reference numeral 200 is a semiconductor device sealed with a sealing resin, reference numeral 201 is an insulating base material, reference numeral 201a is a connecting terminal of an insulating base material (part to be connected), reference numeral 202 is a semiconductor chip, reference numeral 202a is a connecting terminal of a semiconductor chip (part to be connected), reference numeral 203 is an insulating layer, reference numeral 204 is a resin film, reference numeral 205 is a groove, reference numerals 206, 207 are communicating holes, reference numeral 208 is wiring, reference numeral 208a is a wiring main body section, reference numeral 208b is a wiring branch section, and reference nume...
third embodiment
[0142]A wiring method relating to a third embodiment of the present invention is now described with reference to FIGS. 4A to 4I. In FIGS. 4A to 4I, reference numeral 3 is a structure in which a plurality of parts to be connected are exposed, reference numeral 30 is a structure having wiring provided on a surface, reference numeral 300 is a structure having wiring provided on a surface, which is sealed with sealing resin, reference numeral 301 is a copper plate, reference numeral 301a is a connecting terminal (connected part), reference numeral 302 is resist, reference numeral 303 is a metal plating film provided via a nickel plating, reference numeral 304 is a cavity, reference numeral 305 is a semiconductor chip, reference numeral 305a is a connecting terminal of a semiconductor chip (connected part), reference numeral 306 is an insulating layer, reference numeral 307 is a resin film, reference numeral 308 is wiring, reference numeral 308a is a wiring main body section, reference n...
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Abstract
Description
Claims
Application Information
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