System and method for optimizing video encoding and decoding access memory

Abstract

The invention discloses a system and a method for optimizing a video encoding and decoding access memory. The system comprises an entropy encoder and an entropy decoder, wherein the entropy encoder is used for simulating a decoding access memory behavior in an entropy encoding process as well as acquiring decoding access memory behavior information and obtaining an access memory information queue, generating an access memory information auxiliary stream according to the access memory information queue and transmitting the access memory information auxiliary stream to the entropy decoder together with video data subjected to entropy encoding; and the entropy decoder is used for carrying out buffer memory optimal scheduling and decoding on encoded video data by utilizing the access memory information auxiliary stream after the a code stream to be decoded is received. The optimal scheduling of the on-chip buffer memory is achieved so as to greatly reduce the average access memory time delay and an off-chip access memory bandwidth.

Description

technical field [0001] The present invention relates to the technical field of video codec, in particular to a video codec memory access optimization system and method based on an auxiliary stream. Background technique [0002] In order to improve the visual experience, the resolution and frame rate of video sequences are constantly increasing, which makes the memory access in video codec become the main technical bottleneck of the video codec system, and the problem trend is becoming more and more prominent, especially the memory access of the motion compensation part The problem is the most serious. [0003] In the prior art, on-chip cache (on-chip cache) technology is a traditional technology for reducing memory access delay and off-chip memory access bandwidth in video memory access. [0004] However, in the prior art, since the on-chip cache (on-chip cache) does not accurately predict the memory access behavior, optimal scheduling of the on-chip cache (cache) cannot be...

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Problems solved by technology

[0004] However, in the prior art, because the on-chip cache (on-chip cache) does not accurately predict the memory access behavior, the optimal scheduling of the on-chip cache (cache) cannot be realized

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