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Nonvolatile cache mechanism facing SSD

A non-volatile, caching technology, applied in memory systems, memory address/allocation/relocation, instruments, etc., can solve problems such as limiting the use and development of SSDs, limited erasing times, and limited life

Active Publication Date: 2016-12-07
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The technical solution of the present invention is: due to the shortcomings of SSD itself: high price, limited life, that is, limited erasure times, read interference, poor random write performance, etc., limit the use and development of SSD

Method used

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] 1: Implementation based on device mapper mechanism

[0021] figure 1 It is the overall structure diagram of the cache mechanism.

[0022] Target type is a modular plugin interface that allows customization. The mechanism of SCS (SSD cache SSD) is to use this interface to define a new target type, define the cache area and the data area as two new target devices, design the mapping rules of the cache, and logically combine them into a new block equipment. Therefore, through the mapping table, the data from the upper layer can be sent to different devices according to the rules, so as to realize the redirection of the data. The specific steps are:

[0023] 1. The upper-layer write request is first checked by the I / O sequence, and the random I / O is cached in the RAM buffer of small blocks in the memory;

[0024] 2. After the RAM buffer is full, write these together in the form of a sequential log to the SSD buffer in sequence;

[0025] 3. When the buffer is idle or w...

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Abstract

The invention relates to a nonvolatile cache mechanism facing SSD. The method comprises following steps: a SSD is divided into a large buffer area; small random write requests are first written in small RAM buffer; after the RAM buffer is full, those write requests are written together in the form of log into a buffer area sequentially; then data in the buffer area is written back to a data area by a backstage; in this way, the random write-in performance of SSD is effectively increased; the cache mechanism can also optimize read interference problems; the cache mechanism comprises: sequential and large I / O are filtered by an I / O detection algorithm; cache write can also be sequentially written in a data area by a garbage recovery strategy facing data area, at the same time, remaining data in the buffer area can also be written again in the cache sequentially; a read cache strategy is provided for solving the problem of SSD read interference; A SSD cache SSD system of a log structure based on device mapper is fulfilled.

Description

technical field [0001] The invention is applicable to the technical field of SSD non-volatile cache, provides a new SSD-oriented non-volatile cache mechanism, improves the random write performance of the SSD, and effectively alleviates the read interference problem of the SSD. Background technique [0002] As an important part of the computer system, the storage system has always been an important factor affecting the overall performance of the computer system. Since the beginning of the 21st century, with the rapid development of information technology, especially the development and wide application of Internet technology, more and more data have been generated in social production and people's lives, and they have become more and more dependent on data. The data age has arrived. Big data brings new challenges to the storage field. [0003] Due to the continuous increase of the data volume of the application, users have higher and higher requirements on the capacity of t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/08
CPCG06F12/0802
Inventor 肖侬高翔陈志广杨梅芳
Owner NAT UNIV OF DEFENSE TECH
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