Method for balancing interconnection number between different partitions of circuit and readable storage medium

Abstract

The invention discloses a method for balancing interconnection numbers among different partitions of a circuit and a readable storage medium. The method comprises the steps of 1, acquiring a hypergraph with initial partitions; 2, obtaining a first matrix A according to the division of a driving node and a plurality of driven nodes on the line network; 3, obtaining a preprocessing division pair according to the actual connecting line number of the first matrix A and the physical connecting line number of the matrix B; 4, obtaining a moving mode of the to-be-moved node according to a moving result of the to-be-moved node of the preset line network corresponding to the pre-processing division in the preset division; and 5, based on the moving mode of the to-be-moved node, determining a final moving result according to the relationship between the second matrix A obtained after the step 4 and a preset number of times. According to the method, the physical connection line exceeding amount is eliminated or improved by changing the positions of the nodes, so that the maximum exceeding amount of the inter-division connection lines is as small as possible. Meanwhile, no connection is ensured to be generated among partitions which cannot be interconnected.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a method and a readable storage medium for balancing the number of interconnections between different divisions of a circuit. Background technique [0002] Circuit division plays an important role in LSI design. With the rapid development of integrated circuit technology, it has become a reality to integrate millions or even tens of millions of gates on a chip. Therefore, the use of circuit division in large-scale integrated circuit design can effectively reduce the cost of simulating integrated circuits or synthetic complexity. [0003] An important factor that needs to be considered when dividing the circuit is the number of input and output connections between different chips. The number of connections on each chip cannot be increased without limit, and at the same time, some chips cannot have connections between them due to process reasons. Connectio...

AI Technical Summary

Problems solved by technology

These two characteristics of prior art, its shortcoming is respectively: (1) the total amount of interconnection line can not well reflect real interconnection resource tension degree

For example, the total amount of interconnection is small, but they are all concentrated between two partitions, which will cause the connection resources between these two partitions to seriously exceed

(2) There are many issues to be considered in the division stage. In addition to the number of interconnection lines, there are also factors such as resource constraints, fixed nodes, and number of nodes. Therefore, it is usually impossible to obtain a good balance of the number of interconnections.

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