Fan-out type packaging structure and packaging method

A packaging structure and packaging method technology, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of difficult packaging volume reduction and low packaging integration, and achieve reduced power consumption, improved transmission speed, The effect of shortening the conduction path

Pending Publication Date: 2022-03-15
SJ SEMICON JIANGYIN CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a fan-out packaging structure and packaging method, which are used to solve the problems in the prior art that the packaging volume is difficult to reduce and the packaging integration level is low.

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  • Fan-out type packaging structure and packaging method
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  • Fan-out type packaging structure and packaging method

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Embodiment Construction

[0064] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0065] For example, when describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth sho...

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Abstract

The invention provides a fan-out packaging structure and a packaging method. The fan-out packaging structure comprises a first rewiring layer, a second rewiring layer, a metal connecting column, a semiconductor chip, a first filling layer, a first packaging layer, a stacked chip packaging body, a passive element, a second filling layer, a second packaging layer and a metal bump. According to the fan-out packaging structure, various chips with different functions can be integrated in one packaging structure, so that the integration of the fan-out packaging structure can be improved; through the first rewiring layer, the second rewiring layer and the metal connecting columns, three-dimensional vertical stacking packaging is achieved, the integration level of the packaging structure can be effectively improved, the conduction path can be effectively shortened, power consumption is reduced, the transmission speed is increased, and the data processing amount is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a fan-out packaging structure and packaging method. Background technique [0002] Lower cost, more reliable, faster and higher density circuits are the goals pursued by integrated circuit packaging. With the advent of the era of 5G communication and artificial intelligence, chips used in such related fields need to transmit and process high-speed interactive processing with a large amount of data, and the demand for mobile Internet and Internet of Things is becoming stronger and stronger, and the small size of electronic terminal products Globalization and multi-functionalization have become the general trend of industrial development. How to integrate and package different types of high-density chips together to form a system with powerful functions and low volume and power consumption has become a major challenge in the field of advanced packaging of semiconduc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/48H01L21/60H01L21/56H01L23/31H01L23/498H01L25/16
CPCH01L21/4853H01L21/4846H01L21/56H01L24/81H01L23/49811H01L23/49816H01L23/49838H01L23/3114H01L25/16H01L2224/81
Inventor 陈彦亨林正忠
Owner SJ SEMICON JIANGYIN CORP
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