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Parts testing device and method and interface apparatus thereof

A technology of a testing device and a testing method, which is applied in the directions of measuring devices, instruments, measuring electricity, etc., can solve the problems of irreplaceable structural design of the host 11 and the head 12, high cost, and difficulty in replacing the host 11 and the head 12, etc.

Active Publication Date: 2010-10-06
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the device testing apparatus 10 is usually designed to test a plurality of types of DUTs (14) having different characteristics, so it is difficult to replace the main body 11 and the head 12.
A high-speed device testing device 10 needs a long time to develop and a high cost to realize
In addition, there may also be situations where the host 11 and the head 12 cannot be replaced in terms of structural design

Method used

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  • Parts testing device and method and interface apparatus thereof
  • Parts testing device and method and interface apparatus thereof
  • Parts testing device and method and interface apparatus thereof

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Embodiment Construction

[0028] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. figure 2It is a block diagram showing the structure of the device testing device 20 provided according to an embodiment of the present invention. The device testing device 20 includes a host 21 , a head 22 , a performance board 23 and an interface 25 . The device testing device 20 may be a memory testing device for testing double-data-rate synchronous dynamic random access memory (DDR SDRAM: double-data-rate synchronous dynamic random access memory) and other memories.

[0029] The host computer 21 sends a desired test waveform to the DUT (24) as the device under test, and judges whether the DUT (24) is good or bad based on the test result signal output by the DUT (24). The host computer 21 of the present embodiment has and figure 1 The host 11 shown is of similar construction. That is, the host computer 21 may include a test control u...

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Abstract

The present invention relates to a device testing appratus and method, and an interface eqipment. The device testing appratus includes: a performance board for installing the tested devices and inputting / outputting signals aiming at the tested devices; a host for generatering the testing wave of the tested devices; a header for transmitting the test signal based on the testing wave to the performance board, and receiving a test result signal from the performance board corresponding to the test signal; an interface part set between the header and the performance board, for changing the transfer speed of the test signal and the test result signal according to the operating speed of the tested device. Thereby the hagh speed testing can be carried on with low cost.

Description

technical field [0001] The invention relates to a device testing device and method and its interface device, in particular to a device testing device and method capable of performing high-speed testing at a lower cost and its interface device. Background technique [0002] figure 1 It is a block diagram showing the structure of a conventional device testing apparatus 10 . The device testing device 10 may be a memory testing device for testing double-data-rate synchronous dynamic random access memory (DDR SDRAM: double-data-rate synchronous dynamic random access memory) and other memories. Such as figure 1 As shown, the device testing device 10 includes: a main frame (main frame) 11, which is used to generate test logic according to the programmed action and to generate a desired test waveform; a head (head) 12, which is used to generate a test waveform Supply to the device to be tested (hereinafter referred to as "DUT (Device Under Test)") and receive output data from the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/00G01R31/00
CPCG01R31/31713G01R31/31725G01R31/3183
Inventor 梁仁秀朴钟必田炳焕俞皓善
Owner SAMSUNG ELECTRONICS CO LTD
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