Reduced area active above-ground and below-supply noise suppression circuits
a noise suppression circuit and reduced area technology, applied in the field of electronic circuits, can solve the problems of circuit operation errors, complex problems continue to rise to the forefront, and metallurgical limitations are continually raising the coupling effect of line-to-line interconnects
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[0016]With reference now to the figures and particularly with reference to FIG. 1, a diagram of a currently used above-ground noise cancellation circuit is depicted. Noise suppression circuit 100 contains inverters 102, 104, 106, 108, 110, 112, 114. Additionally, this circuit also contains NAND gate 116 along with transistors 118, 120, and 122. Each of the inverters in noise suppression circuit 100 requires two transistors to implement. NAND gate 116 includes three transistors. As a result, noise suppression circuit 100, in this example, requires twenty-one transistors to implement.
[0017]Adding twenty-one transistors to a chip requires additional area on the chip for noise suppression circuit 100. In some cases, this additional area may be considered significant, costly, or even prohibited.
[0018]Turning now to FIG. 2, a diagram illustrating a circuit system is depicted in accordance with an advantageous embodiment of the present invention. In this example, circuit system 200 contain...
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