Continuous-time delta-sigma ADC with compact structure

a technology of continuous-time deltasigma and compact structure, which is applied in the field of continuous-time deltasigma analog to digital converter, can solve the problems of poor system stability and higher cos

Active Publication Date: 2011-09-15
MEDIATEK INC
View PDF9 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The compact structure saves layout area and current consumption while enhancing system stability by maintaining the same difference between summing voltages, allowing the ADC to operate efficiently with reduced complexity.

Problems solved by technology

Since the structure of the conventional continuous-time delta-sigma ADC is complicated, the layout area is wasted and the loop delay is increased, causing a higher cost and worse system stability.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Continuous-time delta-sigma ADC with compact structure
  • Continuous-time delta-sigma ADC with compact structure
  • Continuous-time delta-sigma ADC with compact structure

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0018]Please refer to FIG. 2. FIG. 2 is a diagram illustrating a continuous-time delta-sigma ADC 200 having a compact structure according to the present invention. The continuous-time delta-sigma ADC 200 comprises a loop filter 210, a summing circuit 220, a quantizer 230, and a current DAC 240. The structures and the functions of the loop filter 210, the quantizer 230, and the current DAC 240 are similar to those of the loop filter 110, the quantizer 130, and the current DAC 140 and will not be repeated again for brevity.

[0019]The summing circuit 220 comprises a positive summing resistor RS+ and a negative summing resistor RS−. The summing resistors RS+ and RS− have the same resistance R. The summing resistors RS+ and RS− transform the feedback currents IFB+ and IFB− to the feedback voltages VFB+ and VFB−, respectively, and sum the loop voltages VL+ and VL− to the feedback voltages VFB+ and VFB−, respectively, so as to generate the summing voltages VS+ and VS−. The details are expla...

second embodiment

[0026]Please refer to FIG. 4. FIG. 4 is a diagram illustrating a continuous-time delta-sigma ADC 400 according to the present invention. The continuous-time delta-sigma ADC 400 comprises a loop filter 210, a current DAC 240, and a quantizer 430. The functions of loop filter 210 and the current DAC 240 are described as above-mentioned and will not be repeated again for brevity. It is noticeable that the quantizer 430 is integrated with summing function so that the summing circuit is no longer required. Compared to the quantizer 230, the quantizer 430 does not comprise the input transistors QI+ and QI−. In other words, in the continuous-time delta-sigma ADC 200, the output ends O1 and O2 of the loop filter 210 are coupled to the control ends of the input transistors QI+ and QI−, respectively. However, in the continuous-time delta-sigma ADC 400, the output ends O1 and O2 of the loop filter 210 are, instead, coupled to the voltage dividers 231 and 232, respectively. Hence, in the contin...

third embodiment

[0028]Please refer to FIG. 6. FIG. 6 is a diagram illustrating a continuous-time delta-sigma ADC 600 according to the present invention. The structure and operational principles of the continuous-time delta-sigma ADC 600 are similar to those of the continuous-time delta-sigma ADC 400. The difference is that, in the continuous-time delta-sigma ADC 600, the output stage 611 of the loop filter 610 does not comprise the reference current module 2111. The first ends of the output transistors QO+ and QO− are coupled to the current sources 2331 and 2332 through the voltage dividers 231 (the node X1) and 232 (the node Y1), respectively. Since the currents provided by the current sources 2331 and 2332 are enough for the output transistors QO+ and QO− operating in the saturation region, the current sources 21111 and 21112 from FIG. 5 are not required in the output stage 611 of the loop filter 610. The output transistors QO+ and QO− can operate as source followers for outputting the loop volta...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A continuous-time delta-sigma Analog to Digital Converter (ADC) with a compact structure comprises a loop filter, a summing circuit, a quantizer, and a current Digital to Analog Converter (DAC). The loop filter is utilized for receiving and noise-shaping an analog input signal, and accordingly outputting a positive and a negative loop voltages. The summing circuit comprises a positive and a negative summing resistors. The summing resistors are utilized for transforming a positive and negative feedback currents to be a positive and a negative feedback voltages, and summing the loop voltages and the feedback voltages so as to generate a positive and a negative summing voltages, respectively. The quantizer is utilized for outputting a digital output signal according to a difference between the positive and the negative summing voltages. The current DAC is utilized for generating the positive and the negative feedback currents according to the digital output signal.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a continuous-time delta-sigma Analog to Digital Converter (ADC), and more particularly, to a continuous-time delta-sigma ADC with a compact structure.[0003]2. Description of the Prior Art[0004]The delta-sigma ADC, also referred as the Δ / Σ ADC, has a major advantage of shaping the quantization noise spectrum for efficiently removing the noise from the output. More specifically, the delta-sigma ADC can move the noise from low frequencies into high frequencies so that the noise of the output can be filtered out by a low-pass filter. Since the continuous-time delta-sigma ADC is able to operate at a higher sampling frequency than the discrete-time delta-sigma ADC, the continuous-time delta-sigma ADC is more applicable in wireless communication receivers.[0005]Please refer to FIG. 1. FIG. 1 is a diagram illustrating a conventional continuous-time delta-sigma ADC 100. The continuous-time delta-...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & AuthorityApplications(United States)
IPC IPC(8): H03M3/00
CPCH03M3/39
InventorTSAI, JEN-CHE
OwnerMEDIATEK INC