Method for the preparation of a multi-layered crystalline structure

a crystalline structure and multi-layer technology, applied in the direction of thin material processing, electrical equipment, semiconductor devices, etc., can solve the problems of fracturing the device layer or substrate, severe limit on the maximum temperature, and general inconvenient chemo-mechanical polishing to achieve uniformity

Inactive Publication Date: 2013-05-30
SUNEDISON SEMICON LIMITED UEN201334164H
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach efficiently produces a smooth, uniform multi-layered crystalline structure with reduced thermal stress, enabling the use of recycled handle wafers and minimizing the need for costly and time-consuming processing steps, while maintaining device layer integrity.

Problems solved by technology

During manufacture of such structures, however, the different rates of thermal expansion can create very large stresses in the multilayered structures when they are heated, which can fracture the device layer or substrate.
This places severe constraints on the maximum temperature that these dissimilar pairs can be exposed to during manufacture.
However, chemo-mechanical polishing is generally not suitable to achieve the uniformity required for state of the art multilayered structures and is therefore not desirable.
Thermal methods may also be used to thin and smooth a wafer surface; however, while thermal methods easily achieve film target thicknesses, uniformity, and smoothness, they require that the wafer be heated to high temperatures, which damage the crystallinity of the film due to the aforementioned stresses.
Preparing a multi-layer structure in this way, however, is not without problems.
For example, as the entire handle wafer must be ground or etched away, the process can become both time consuming and costly.

Method used

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  • Method for the preparation of a multi-layered crystalline structure
  • Method for the preparation of a multi-layered crystalline structure
  • Method for the preparation of a multi-layered crystalline structure

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Embodiment Construction

[0015]In accordance with the present invention, an improved process for making a multi-layered crystalline structure has been discovered. More specifically, it has been discovered that the use of layer transfer and chemical etching techniques provides an improved method for more efficiently producing a multi-layered crystalline structure. In accordance with the invention, the donor structure may be any structure generally comprising at least a device layer, a handle wafer, and an intervening layer disposed therebetween. Advantageously, the handle wafer of the donor structure may be recycled multiple times. For exemplary purposes herein, the donor structure is a silicon-on-insulator structure.

[0016]It is to be noted that the silicon-on-insulator structure used for the donor structure in the exemplary embodiment of the instant invention may be formed by known processes. Such processes include, for example, SOI formation by oxygen implantation (Simox), bonding a semiconductor wafer to ...

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Abstract

This invention generally relates to a process for making a multi-layered crystalline structure. The process includes implanting ions into a donor structure, bonding the implanted donor structure to a second structure to form a bonded structure, cleaving the bonded structure, and removing any residual portion of the donor structure from the finished multi-layered crystalline structure.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a Continuation of U.S. patent application Ser. No. 12 / 974,772, filed Dec. 21, 2010, which claims the benefit of U.S. Provisional Application No. 61 / 290,961, filed Dec. 30, 2009, both of which are incorporated herein by reference in their entirety.FIELD OF THE INVENTION[0002]The present invention relates generally to a process for the preparation of a multi-layered crystalline structure.BACKGROUND OF THE INVENTION[0003]Multi-layered structures comprising a device layer with a device quality surface, such as a silicon-geranium or sapphire layer, and a silicon substrate that has a different crystal lattice structure than the material of the device layer are useful for a number of different purposes. These multi-layered structures typically comprise multiple layers of material having differing coefficients of thermal expansion. During manufacture of such structures, however, the different rates of thermal expansion can cre...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L21/78
CPCH01L21/76254Y10T428/24174H01L21/78H01L21/18H01L27/12
InventorWITTE, DALE A.LIBBERT, JEFFREY L.
OwnerSUNEDISON SEMICON LIMITED UEN201334164H