Relaxation oscillator with self-biased comparator

Abstract

A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Description

BACKGROUND OF THE INVENTION[0001]The present invention generally relates to relaxation oscillators, and, more particularly, to a relaxation oscillator with a self-biased comparator.[0002]Relaxation oscillators are widely used in modern electronic systems including radios, telecommunications, computers, and other electronic systems to generate oscillator signals. The oscillator signals are required to meet timing critical requirements such as modulation and demodulation of message signals in communication systems, synchronous operation of electronic circuits, and so forth. A conventional relaxation oscillator includes a resistor-capacitor (RC) circuit connected to a power supply, first and second comparators, and a logic circuit. The RC circuit includes a resistor and first and second capacitors. The first and second capacitors are connected to the first and second comparators to provide first and second capacitor voltages to negative terminals of the first and second comparators, re...

AI Technical Summary

Benefits of technology

The patent describes a circuit that generates an accurate output clock signal using a reference current. The circuit ensures smooth and consistent transitions in the signal and low frequency spread across process and temperature corners. This results in a more reliable and accurate output clock signal.

Problems solved by technology

The first and second comparators require a current source to operate, which occupies silicon area and consumes power.

Since cost and battery life of electronic devices have placed strict constraints on system-on-a-chip (SoC) area and power consumption, having separate circuits for the first and second comparators and the current source considerably increases the area and power consumed by the SoC.

Additionally, propagation delays of the first and second comparators vary substantially across process corners, which leads to a variation in the frequency of the oscillator signal and deterioration in the fidelity of the oscillator signal.

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