Semiconductor device and method for manufacturing the same

a technology of semiconductors and semiconductors, applied in semiconductor devices, electrical devices, nanotechnology, etc., can solve the problems of increasing the rate of degradation of inter-poly insulating films, dielectric breakdown, and increasing leakage curren

Inactive Publication Date: 2013-12-10
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach reduces the rewrite voltage needed, enhances charge injection efficiency, and maintains charge retention characteristics by suppressing stress-induced leakage current and preventing electron loss from the floating gate electrode.

Problems solved by technology

However, when the voltage (rewrite voltage) applied to the control electrode is raised for rewrite operation, the rate of degradation of inter-poly insulating film increases.
The degradation of the inter-poly insulating film results in dielectric breakdown, an increase in leakage current, and a decrease in reliability.
However, the above method has the following problem.
At the time of the dry etching, the sidewall of the gate portion is damaged by plasma and film quality of the sidewall of the tunnel insulating film is deteriorated.
The charge injection stress causes leakage current (stress-induced leakage current) to occur at the sidewall having the deteriorated film quality of the tunnel insulating film.
This leakage current causes electrons in the floating gate electrode to flow out, which results in a degradation of charge retention characteristic.

Method used

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  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same

Examples

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first embodiment

[0031]FIG. 1 is a plan view of a semiconductor device according to a first embodiment, specifically, FIG. 1 is the plan view, which illustrates a plurality of nonvolatile memory cells (hereinafter referred to simply as memory cells) that constitute a memory cell array in the semiconductor device.

[0032]FIG. 2 is a sectional view (sectional view along the channel length direction) taken along line 2-2′ of FIG. 1 and FIG. 3 is a sectional view (sectional view along the channel width direction) taken along line 3-3′ of FIG. 1.

[0033]The memory cell array constitutes a NAND flash memory. Specifically, the semiconductor device is adapted for use in electronic equipment, such as a music playback device, which is equipped with a nonvolatile memory.

[0034]Each memory cell includes a tunnel insulating film, a floating gate electrode, a control gate electrode, an interelectrode insulating film, and source / drain regions. The memory cell of the present embodiment will be further described hereinaf...

second embodiment

[0059]FIG. 14 is a sectional view showing a semiconductor device according to a second embodiment. FIG. 14 is the sectional view in the channel length direction corresponding to FIG. 2. In FIG. 14, the portions corresponding to the portions shown in the previously mentioned drawings are denoted by the same reference numerals and omitted its detail explanation.

[0060]The present embodiment is different from the first embodiment in that a silicon nitride film 9 is provided on the side surface of the floating gate electrode 3. The reason for providing the silicon nitride film 9 is to prevent the floating gate electrode 3 from being oxidized in the oxidation step for making the grain size of the silicon grains smaller in FIGS. 12A and 12B. The prevention of oxidation of the floating gate electrode 3 leads to the prevention of degradation of its performance as an electrode. The present embodiment can also provide the same advantages as the first embodiment.

[0061]One method of forming the ...

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Abstract

A semiconductor device includes a semiconductor substrate, and a nonvolatile memory cell provided on the semiconductor substrate, the nonvolatile memory cell including a tunnel insulating film provided on a surface of the semiconductor substrate, the tunnel insulating film including semiconductor grains, the semiconductor grains included in both end portions of the tunnel insulating film having smaller grain size than the semiconductor grains included in other portions of the tunnel insulating film, a charge storage layer provided on the tunnel insulating film, an insulating film provided on the charge storage layer, and a control gate electrode provided on the insulating film.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]Notice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 8,115,248. The reissue applications are application Ser. Nos. 13 / 616,208 (the present application), and 13 / 914,798, which is a divisional reissue application of 13 / 616,208. [0002]This application is a reissue application of U.S. Pat. No. 8,115,248. This application is also based upon and claims the benefit of priority from prior Japanese Patent Application No. 2008-040642, filed Feb. 21, 2008, the entire contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The present invention relates to a semiconductor device comprising an electrically rewritable nonvolatile memory cell and method for manufacturing the same.[0005]2. Description of the Related Art[0006]In a nonvolatile semiconductor device comprising a floating gate electrode, the voltage of control electrode controls the voltage of f...

Claims

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Application Information

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Patent Type & AuthorityPatents(United States)
IPC IPC(8): H01L21/331
CPCB82Y10/00H01L29/42332H01L29/7881H01L29/40114H01L29/40117H10B41/30
InventorKAI, TETSUYAOHBA, RYUJIOZAWA, YOSHIO
OwnerKK TOSHIBA