Simulation test method of integrated circuits

Abstract

The invention relates to a simulation test method of integrated circuits, which comprises the following steps of: reading in a netlist of the integrated circuits; generating corresponding list files according to data of a register, a latch, an RAM and an ROM; generating a field data preservation task and a field data recovery task according to a verilog hardware description language by the list files; transferring the field data preservation task at different simulation time points to preserve simulation field data at different appointed simulation time points; generating a plurality of mutually independent simulation threads, wherein every simulation thread starts simulation software; transferring the field data recovery task for initializing the integrated circuit which is in simulation correspondence with each simulation software into the field data preserved at different simulation time points, and starting up all the simulation threads for simulation verification. The invention greatly shortens the simulation time and improves the simulation efficiency.

Description

technical field [0001] The invention relates to a circuit simulation test method, in particular to a simulation test method which adopts a segmented form to improve the simulation verification speed of an integrated circuit. Background technique [0002] Modern circuit design technology, in addition to directly drawing circuit diagrams, also has a way to directly implement circuits in language. This language is called Hardware Description Language (Hardware Description Language, HDL). With the development of large-scale logic circuits, hardware description languages ​​have been widely used, among which verilog HDL is the most used. [0003] EDA (Electronic Design Automatic) technology uses computer as a tool to complete design files using hardware description language, and automatically complete logic compilation, simplification, segmentation, synthesis and optimization, layout and routing, simulation and other work. The emergence of EDA technology has greatly improved the ...

AI Technical Summary

Problems solved by technology

However, the existing EDA tools do not have the function of restoring the simulation environment in the next simulation after the simulation is interrupted, so each simulation needs to be stimulated by the same vector before the circuit can run to the desired state. As a result, a lot of time was spent, which seriously affected the design progress of the chip.

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