Field programmable gate array (FPGA) based method for achieving synchronous detection of oversampling Golay sequence
A technology of sequence detection and synchronization detection, which is applied in the field of communication, can solve the problems of multiple resources, reduce operation processing speed, occupation, etc., achieve the effect of reducing on-chip resources, reducing false synchronization and false out-of-step, and improving operation speed
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[0020] The present invention will be described in detail below in conjunction with the examples.
[0021] Such as Figure 1 to Figure 5 Shown, realize the synchronous detection method of oversampling Golay sequence based on FPGA, it is characterized in that, the hardware system that method adopts is set up on FPGA basis, comprises Golay sequence detector module, parameter reading control module, system control module, relevant judgment and Locking module, delay module and sequence extraction module;
[0022] Depend on figure 1 It can be seen that the data input terminal sends the oversampled data to the Golay sequence detection module, and the parameter reading control module configures the parameters of the local reference sequence according to the corresponding configuration. Similarly, the system control module is configured with the relevant judgment locking module and delay module. Through the sequence detection module, the correlation peak value is sent to the j...
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