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Field programmable gate array (FPGA) based method for achieving synchronous detection of oversampling Golay sequence

A technology of sequence detection and synchronization detection, applied in the field of communication, can solve the problems of multi-resource, reduce operation processing speed, occupation, etc., achieve the effect of reducing on-chip resources, reducing false synchronization and false out-of-sync, and improving operation speed

Active Publication Date: 2013-04-03
TOEC TECH
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Problems solved by technology

[0005] The Golay sequence value is composed of +1 and -1, so each shift register uses at least 2 bits to store the input data, and the length of the Gray sequence is N, so the implementation of the detector uses at least 2N shift registers and N multipliers To store and perform sliding correlation, it takes up quite a lot of resources for the FPGA, and greatly reduces the processing speed of the system

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  • Field programmable gate array (FPGA) based method for achieving synchronous detection of oversampling Golay sequence
  • Field programmable gate array (FPGA) based method for achieving synchronous detection of oversampling Golay sequence
  • Field programmable gate array (FPGA) based method for achieving synchronous detection of oversampling Golay sequence

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Embodiment Construction

[0020] The present invention will be described in detail below in conjunction with the examples.

[0021] Such as Figure 1 to Figure 5 Shown, realize the synchronous detection method of oversampling Golay sequence based on FPGA, it is characterized in that, the hardware system that method adopts is set up on FPGA basis, comprises Golay sequence detector module, parameter reading control module, system control module, relevant judgment and Locking module, delay module and sequence extraction module;

[0022] Depend on figure 1 It can be seen that the data input terminal sends the oversampled data to the Golay sequence detection module, and the parameter reading control module configures the parameters of the local reference sequence according to the corresponding configuration. Similarly, the system control module is configured with the relevant judgment locking module and delay module. Through the sequence detection module, the correlation peak value is sent to the j...

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Abstract

The invention relates to a field programmable gate array (FPGA) based method for achieving synchronous detection of an oversampling Golay sequence. A hardware system established on the basis of FPGA comprises a Golay sequence detector module, a parameter read control module, a system control module, a related judgement and locking module, a time delay module and a sequence extraction module, the Golay sequence is used as a synchronous sequence, the possibility of false synchronization and false loss of synchronism can be reduced, a detecting module uses a special not exclusive or algorithm, 50% of shifting registers occupied by a slippage correlation operation can be freed, by means of the parameter read control module, multiplexing of correlation operation of the Golay sequence with various lengths and parameters is achieved, similarly, FPGA on-chip resources occupied by a synchronizing system are reduced, the sequence detection operation interval can be flexibly adjusted by the system according to different oversampling ratios, and the synchronous detection supporting 1 to 16 times oversampling is achieved.

Description

technical field [0001] The invention relates to equipment in the communication field, in particular to a method for realizing synchronous detection of an oversampled Golay sequence based on FPGA. Background technique [0002] Oversampling technology is commonly used in modern digital signal processing, and oversampling is to use a frequency much larger than the Nyquist sampling frequency to sample the input signal. Oversampling is to change the distribution of noise and reduce the noise within the bandwidth of the useful signal. [0003] Oversampling can improve time-domain resolution to obtain better time-domain waveforms; can improve filter processing gain, and when filtering in the frequency domain, filter design becomes easier; can improve signal-to-noise ratio, and match filtering can Better collection of wave energy. [0004] Golay sequence was first discovered by Golay, it is a complementary binary code sequence with many useful properties. One of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/7095
Inventor 张鹏泉马彪李柬曹晓冬褚孝鹏范玉进李羚梅张波郝帅龙
Owner TOEC TECH
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