Gating logical circuit composed of SET/MOS hybrid circuit

Abstract

The invention relates to a gating logical circuit composed of an SET / MOS hybrid circuit. The gating logical circuit composed of the SET / MOS hybrid circuit comprises a PMOS transistor, an NMOS transistor and a single-electron transistor, wherein the source electrode of the PMOS transistor is connected with a power source Vdd, the grid electrode of the PMOS transistor is connected with a reference voltage Vpg, the drain electrode of the PMOS transistor serves as the output end of the gating logical circuit and is connected with the drain electrode of the NMOS transistor, the grid electrode of the NMOS transistor is connected with a reference voltage Vng, the source electrode of the NMOS transistor is connected with the drain electrode of the single-electron transistor, the source electrode of the single-electron transistor is earthed, and a back grid is connected with a back grid voltage Vctrl. The single-electron transistor comprises three input ends, C1 equals to C2 times and equals to C3 times 2, wherein C1 is the capacitance of the first input end, C2 is the capacitance of the second input end and C3 is the capacitance of the third input end. The gating logical circuit composed of the SET / MOS hybrid circuit is quite low in power consumption, quite small in size of a device, strong in drive capability and large in output swing amplitude.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a gate logic circuit composed of a SET / MOS hybrid circuit. Background technique [0002] Digital to Analog Converter (DAC) is a device that converts digital quantities into analog quantities. Common DACs are mainly divided into capacitive type, resistive type and current type. Among these three structures, the current mode DAC has attracted much attention due to its high speed, low power consumption and easy implementation. The advantage of the current mode DAC is that it has a smaller area when the accuracy is less than 10 bits, and the speed is not limited by the amplifier bandwidth and RC delay, and can achieve very high speed. Because all the current flows directly to the output terminal, its energy utilization efficiency is very high, and the circuit structure is simple, easy to implement, and suitable for high-speed fields. [0003] However, as CMOS technology e...

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