18 results about "Resistive type" patented technology

The utility model discloses a kind of high-efficiency heat dissipation resistance bimetallic strip, it is related to bimetallic strip technical field, including upper metal sheet, the bottom of the upper metal sheet is equipped with lower metal sheet, and the inside of the upper metal sheet and lower metal sheet is equipped with inner metal sheet, the side of the upper metal sheet is equipped with connecting plate, the inside of the connecting plate is fixedly connected with connecting column, the inside of the connecting column is threadedly connected with fixed bolt one, the side of the inner metal sheet is fixedly connected with heat-conducting sheet, the utility model is equipped with inner metal sheet inside the upper metal sheet and lower metal sheet, inner metal sheet inside fixedly connected heat-conducting sheet can absorb the heat on inner metal sheet, upper metal sheet and lower metal sheet inside the arc-shaped groove inside and heat-conducting sheet are clamped, the copper sheet of arc-shaped groove inside is in contact with heat-conducting sheet, heat is quickly discharged by radiating bump one and radiating bump two, improve the heat dissipation of resistance bimetallic strip.

This invention discloses a resistance testing method, relating to the technical field of intelligent testing, comprising the following steps: Step S100, testing a resistor of any type, independently analyzing the test results to obtain its own characteristics; Step S200, performing forward and reverse tests on the resistor under test according to the testing method, obtaining positive and negative results; Step S300, classifying the resistor under test into grades based on the positive and negative results and its own characteristics. This invention improves the scientific nature of subsequent analysis and the rationality of test parameters by screening effective historical data, avoiding irreversible damage to the resistor, and improving the economy of testing. By taking the average value of forward and reverse tests and analyzing the difference, it eliminates unidirectional systematic errors such as contact resistance, lead resistance, and thermoelectric potential.

The application discloses a resistance type airflow sensor, comprising: a front shell; a rear shell clamped at the rear end of the front shell; and a sensing element packaged between the front shell and the rear shell, wherein the sensing element comprises a hard plate base material and a sensing chip, the hard plate base material is fixedly installed with the front shell, the sensing chip is fixedly installed with the rear shell, one side of the hard plate base material is provided with a sensitive membrane, and the sensing chip is connected with the sensitive membrane through a wire harness. The protective plate is arranged on the front shell and the rear shell, the fan-shaped rubber pieces on the inner wall of the protective plate are mutually adsorbed and closed through rubber magnetic strips in the absence of airflow, a barrier is formed, and particulate matters and condensate in the airflow are effectively blocked from directly contacting the sensitive membrane; when the airflow passes, the airflow pressure pushes away the rubber pieces, allows the airflow to pass, but blocks most of the pollutants, thereby protecting the sensitive membrane from being polluted, ensuring long-term stability and accuracy of the sensor; meanwhile, the protective plate is connected with the groove through a threaded ring, is convenient to disassemble and clean, and maintenance convenience is improved.

The application discloses a GaN-based hysteresis comparison circuit and relates to the field of semiconductor circuits.The circuit comprises a comparator circuit, a feedback circuit and a current mirror circuit which are connected with each other.The comparator circuit comprises a first N-type GaN device, a second N-type GaN device, a third N-type GaN device, a fourth N-type GaN device and a fifth N-type GaN device.The feedback circuit comprises a sixth N-type GaN device, a seventh N-type GaN device and an eighth N-type GaN device.The feedback circuit is composed of N-type GaN-based active devices instead of resistance passive devices, and the output signal is fed back to the gate of the seventh N-type GaN device, so that the circuit gain is improved, and the signal conversion time is reduced.

The invention discloses a field-circuit coupling joint simulation modeling method for a resistance-type superconducting current limiter, which belongs to the technical field of simulation and comprises the following steps: constructing an electromagnetic heat calculation model of the resistance-type superconducting current limiter based on COMSOL; constructing a circuit simulation model of the resistance type superconducting current limiter power system based on Simulink; and performing joint simulation according to the electromagnetic heat calculation model and the circuit simulation model to obtain the average electric field intensity of the resistance type superconducting current limiter, the average temperature of each layer of the superconducting tape and the average current density of each layer of the superconducting tape. According to the method, through joint simulation modeling of COMSOL and Simulink, current distribution, temperature field distribution, magnetic field distribution, heating and temperature rise of the resistance type superconducting current limiter can be analyzed while parameters such as voltage and current in a circuit are analyzed.

A magnetoresistive random access memory ("MRAM" for short) device includes at least one MRAM array. Each MRAM array includes a reference cell and a reference generator that generates a reference voltage between a first voltage and a second voltage, the first voltage being a function of a first current flowing through the first reference cell and the second voltage being a function of a second current flowing through the second reference cell, the first reference cell and the second reference cell are a pair of reference cells storing complementary values in a row of the MRAM array. Reference voltage can be automatically centered and track reading current changes of all PVT angles, and the reference voltage does not need to be adjusted. In some embodiments, the reference generator is used in cooperation with a current detection amplifier, and correct read data of all PVT angles can be reliably output.

The application discloses a resistance testing method, and relates to the technical field of intelligent testing, and comprises the following steps: step S100, testing any resistance model of resistance, independently analyzing the testing result, and obtaining self characteristics; step S200, performing positive testing and reverse testing on the resistance to be tested according to the testing method, and obtaining positive result and reverse result; and step S300, dividing the grade of the resistance to be tested according to the positive result, the reverse result and the self characteristics. Through screening of effective historical data, the application improves the scientificity of subsequent analysis and the rationality of testing parameters, avoids irreversible damage to the resistance, improves the economy of testing, eliminates one-way system errors such as contact resistance, lead resistance and thermoelectric potential through mean value taking of positive and reverse testing and difference value analysis.

In the described example, the R2R digital-to-analog converter includes a plurality of arms and a voltage regulator (110). Each arm includes an arm switch (130) having a p-channel MOSFET (PFET) switch (132) and an NFET switch (134). The voltage regulator includes a differential amplifier (314), a p-ladder (308) including N cascode-coupled PFETs (306) and having first and second ends, an n-ladder (318) including γ×N cascode-coupled NFETs (316) and having first and second ends, a first resistor (310), and a second resistor (resistor γ×R) (312). The first p-ladder end is coupled to a first terminal of the first resistor. The second terminal of the first resistor is coupled to the input of the differential amplifier and the first terminal of the second resistor, the second terminal of the second resistor is coupled to the first n-ladder end, and the output of the differential amplifier is coupled to the second n-ladder end to provide the gate voltage of the NFET switch.

An RTD (Resistant Temperature Detector) test terminal and device are disclosed, relating to the field of PLC testing technology. Addressing the problems of excessive manual wiring and switching operations, low testing efficiency, susceptibility to connection errors or omissions, and difficulty in achieving rapid and stable multi-channel measurements in existing PLC testing processes, this invention provides an RTD test terminal. The terminal includes a main body with a circuit board, probes and pin sleeves, a cover plate, an upper cover plate, a back clamp bracket, a back clamp, a back clamp baffle, and pin sleeve slots. The probes and pin sleeves are used to contact the tested terminal. The circuit board is used for electrical connection with the probes and switching output levels. The cover plate and upper cover plate are used for encapsulation, and the back clamp bracket, back clamp, and back clamp baffle are used for clamping and mounting. This test terminal is suitable for rapid testing and switching measurements of RTD signal channels in PLC cabinets.

The application belongs to the technical field of directional coupler, and is a resistance type wideband directional coupler based on transmission line structure, which comprises two uncoupled uniform transmission lines, the two lines have a common reference ground, and are spatially isolated by a split surface, the split surface is perpendicular to the conductor plane between the connecting lines of the two uncoupled uniform transmission lines; an input port, a straight-through output port, a coupled output port and an isolation port are arranged on the two lines respectively. The two lines are both composed of quarter wavelength transmission line groups of the same order, one is a main transmission line, and the other is a coupled transmission line, and the characteristic impedances of the two lines are the same as the impedance of the external port. There is a coupling resistor across the quarter wavelength coupled transmission line group. The transmission line electric length between adjacent coupling resistors is a quarter wavelength; the application can reduce the requirement for processing error due to the symmetrical and simple structure, and has the characteristics of low reflection coefficient and ultra-wideband operation.

This invention discloses an isolated current source converter based on an SP-type pseudohermite coreless transformer, comprising a negative resistor, an SP-type pseudohermite coreless transformer, a full-bridge rectifier, and a load resistor. The negative resistor is connected to the input terminal of the SP-type pseudohermite coreless transformer. The full-bridge rectifier includes a first rectifier arm, a second rectifier arm, an output filter inductor, and an output filter capacitor. The switching nodes of the first and second rectifier arms are connected to the output terminal of the SP-type pseudohermite coreless transformer. The output filter inductor and output filter capacitor are connected in series and then in parallel with the first and second rectifier arms, respectively. The output filter capacitor is connected in parallel with the load resistor. This invention, using an SP-type pseudohermite coreless transformer as its core, realizes a coreless isolated current source converter with constant current output characteristics independent of the load. This invention achieves corelessness, greatly reducing the weight, size, and cost of the isolated current source converter.

This application discloses a calibration device and method for an active rod antenna, relating to the field of antenna calibration. The device includes a metal shielding housing and a resistive T-network module and a capacitor integrated within the metal shielding housing. The resistive T-network module simulates the input impedance of the active rod antenna, and the capacitor simulates the distributed capacitance. When the input RF interface is connected to a standard signal source, the output RF interface is connected to a spectrum analyzer, and the ground terminal is connected to the active antenna host, the antenna factor of the active rod antenna is calculated by measuring the first signal strength at the output RF interface and the second signal strength at the output port of the active antenna host, thus completing the calibration. This application enables portable, accurate, and efficient calibration of active rod antennas.

The utility model relates to the field of automobile manufacturing, concretely relates to a low pressure wire harness for mistake proofing of resistance type circuit. It includes cabin wire harness, front protection wire harness, left front bluetooth slave module and right front bluetooth slave module, is provided with the joint pressure point between front protection wire harness and left front bluetooth slave module, right front bluetooth slave module, forms the branch wire harness of left front bluetooth slave module and right front bluetooth slave module, the branch wire harness length of left front bluetooth slave module and right front bluetooth slave module is same and all is less than or equal to 1m. The utility model relates to the improvement cost of wire harness circuit is low, and the risk of wrong installation is solved forever, and other negative influence will not be brought.

This invention proposes a compacted field reflector with a frequency selective surface (FSS) around its edge to address the severe low-frequency edge scattering problem of existing reflectors. The reflector comprises a parabolic compacted field reflector body and a frequency selective surface (FSS) loaded along its edge. The parabolic compacted field reflector body has a sawtooth edge. The frequency selective surface (FSS) includes a dielectric substrate and a resistor patch printed thereon. The dielectric substrate and the parabolic compacted field reflector body form a nested structure, with periodically arranged triangular sawtooths around its perimeter. The resistor patch is etched with a plurality of periodically arranged first cross-shaped slits and a plurality of second cross-shaped slits. This invention loads a resistor-type frequency selective surface structure at the edge of the reflector, reducing reflection abrupt changes and edge currents, improving edge scattering, and enhancing quiet zone performance, making it suitable for compacted field measurement systems.

The application relates to the technical field of energy monitoring, in particular to a temperature monitoring circuit, method, device and energy management system. The circuit comprises a plurality of resistance type temperature sensors, the temperature sensors are arranged at temperature monitoring points with different heat capacity characteristics respectively, are used for monitoring the temperature of the corresponding monitoring points, and a sensor network is formed by the plurality of temperature sensors in parallel, and the plurality of temperature sensors have different temperature-electricity characteristics. A signal acquisition circuit is connected with the sensor network, is used for converting the equivalent resistance of the sensor network into a single analog signal output, a signal processing unit is connected with the output end of the signal acquisition circuit, is used for collecting the analog signal, and performs characteristic analysis on the analog signal to determine the temperature monitoring point with abnormal temperature rise. On the one hand, the problem that the complexity is high and the cost sharply rises with the number of monitoring points is solved, and on the other hand, the temperature states of a plurality of monitoring points with different heat capacities and response characteristics such as battery cells and welding points are distinguished.

This invention discloses a low-area comparator offset calibration circuit suitable for sub-ADCs, relating to the field of integrated circuit design technology. The circuit includes a capacitive digital-to-analog converter (DAC) module, a resistive DAC module, a comparator module, and a successive approximation logic module. The capacitive DAC module is a fully differential structure, including a positive-terminal capacitor array and a negative-terminal capacitor array. This invention utilizes a high-area-efficiency R-DAC to replace the traditional large-area capacitor calibration array, and further reduces the number of resistors through a segmented structure. Comparator offset is compensated by injecting an adjustable voltage into the calibration capacitor base plate. This invention significantly reduces circuit area overhead and power consumption while maintaining calibration accuracy, with minimal impact on main circuit performance, making it particularly suitable for area-constrained sub-ADC applications.

The application discloses a kind of resistance type superconducting current limiter design method and device based on SysML, the method comprises the following steps: S1, the design requirement of resistance type superconducting current limiter is obtained and requirement analysis is carried out;S2, according to design requirement, the function logic architecture of resistance type superconducting current limiter is analyzed;S3, the physical architecture of resistance type superconducting current limiter is obtained by converting through design parameter and function logic architecture;S4, the design result of resistance type superconducting current limiter is output and obtained by physical architecture and the set thermoelectric analogy algorithm.The application solves the technical problems that the complexity of finite element simulation and numerical simulation in the prior art is too high, and the design process requirement analysis and architecture design are insufficient, can quickly design resistance type superconducting current limiter and improve the accuracy and consistency of its design result.

The embodiment of the invention provides a resistive digital-to-analog converter, a successive approximation register analog-to-digital converter and equipment, a first switch array comprises a plurality of first switches, the first ends of the plurality of first switches are connected with a plurality of continuous voltage taps in a first group in a one-to-one correspondence manner, and the second ends of the plurality of first switches are connected with a first output node; the second switch array comprises a plurality of second switches, the first ends of the plurality of second switches are connected with the second group of continuous voltage taps in a one-to-one correspondence mode, and the second ends of the plurality of second switches are connected with the second output node. As the number of switches of the first switch array is one more than that of switches of the second switch array, the decoder can only control the first switch array to switch the connected voltage taps when the least significant bit of the received digital code is changed, so that the differential voltage between the first output node and the second output node is monotonically changed; therefore, on the premise that the number of the resistor string taps and the total area of the switch array are not increased, the resolution of the resistance-type digital-to-analog converter is effectively improved.